可编程且可扩展的片上波分复用处理平台：基于级联无自由光谱范围谐振器
Programmable and scalable on-chip WDM processing platform enabled by cascaded FSR-free resonators
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中文总结 AI 辅助
本文提出基于级联无自由光谱范围谐振器的可扩展片上WDM处理平台，实现宽带低损耗操作，支持通信、可重构处理和并行计算，为下一代光子集成系统提供统一方案。
中文摘要 AI 辅助
波分复用（WDM）对于扩展光子系统的容量和功能至关重要，其应用范围从通信到计算。然而，用于宽带操作的片上实现从根本上受到传统光学微腔的窄自由光谱范围（FSR）和低效下载传输的限制。在此，我们通过基于级联双面耦合法布里-珀罗下载-下载谐振器的可扩展集成WDM处理平台超越了这一限制。该单元实现了创纪录的大无自由光谱范围带宽（>300 nm）和低插入损耗（<0.5 dB），同时能够在波长和强度域独立操纵单色光。利用这些性能，我们在单总线波导中构建了多达20个信道的可编程核心，通过配置展示了应用多样性：作为高容量片上WDM通信结构（2.4-Tbps单链路WDM传输和O到C波段多子带（解）复用），作为可重构光学处理器（宽带和无中断波长选择性切换），以及作为并行计算加速器（理论上能够进行1.28-TOPS卷积运算，16信道调制）。这项工作建立了一个统一且多功能的WDM处理平台，弥合了高速光通信与在线计算之间的鸿沟，为每秒太比特级链路和数百TOPS的片上计算铺平了可扩展且向后兼容的道路，解决了下一代光子系统的关键瓶颈。
英文摘要
Wavelength-division multiplexing (WDM) is pivotal for expanding the capacity and functionality of photonic systems, from communications to computing. However, on-chip implementation for broadband operation is fundamentally limited by the narrow free spectral range (FSR) and inefficient drop transmission of conventional optical microcavities. Here, we transcend this limit with a scalable integrated WDM processing platform based on cascaded dual-sided coupled Fabry-Pérot add-drop resonators. This unit achieves a record-large FSR-free bandwidth (> 300 nm) and low insertion loss (< 0.5 dB), while enabling independent manipulation of monochromatic light in both the wavelength and intensity domains. Leveraging these performances, we architect programmable cores with up to 20 channels in a single bus waveguide to demonstrate application versatility by configuring as: a high-capacity on-chip WDM communication fabric (2.4-Tbps single-link WDM transmission and O-to-C-band multi-subband (de)triplexing), a reconfigurable optical processor (broadband and hitless wavelength-selective switching), and a parallel computing accelerator (theoretically capable of 1.28-TOPS convolution operations, 16-channel modulation). This work establishes a unified and versatile WDM processing platform that bridges high-speed optical communication with in-line computing, charting a scalable and backward-compatible path toward petabit-per-second-class links and hundreds of TOPS of on-chip computation, resolving a critical bottleneck for next-generation photonic systems.
发表机构
- Westlake University（西湖大学）
- Westlake Institute for Advanced Study（西湖高等研究院）
- Zhejiang University（浙江大学）
- Crealights Technology Co., Ltd.（创灵科技有限公司）
机构由 AI 辅助整理，请以论文原文为准。
