发表机构
University of Pisa（比萨大学）
机构由 AI 辅助整理，请以论文原文为准。AI 中文总结
本文提出基于量子相位的比较器（QPC），通过相对相位编码和干涉测量实现两值比较，仅需一个量子比特，且支持叠加操作数，通过缩放相位可降低决策射击次数。
AI 中文摘要
量子比较器决定两个操作数的大小顺序。它们依赖于作用于基编码整数的可逆逻辑，因此其宽度随精度增长。我们引入了基于量子相位的比较器（QPC），它改为比较以相对相位携带的两个值。该电路将两个相位以相反符号输入，置于一对Hadamard门之间，并通过固定偏移使干涉居中，从而当第一个相位较小时，测量到零的概率恰好降至二分之一以下。我们给出了两种实现。对于硬编码值，两个值被写入两个相位门的参数中，比较成本为一个量子比特和五个门。对于寄存器驱动的级联，值通过二进制加权受控相位门从两个$t$量子比特寄存器中提取，成本为寄存器之外的一个量子比特和与$t$线性相关的深度；由于级联从寄存器内容线性地诱导每个相位，一个电路可处理操作数对的叠加。读出产生的是有偏硬币而非确定比特，我们量化了在给定相位分离下决策所需的射击次数。将两个相位按整数缩放可在不增加宽度或深度的情况下扩大决策裕度，而自适应倍增调度将此放大转化为与逆分离的对数成比例的射击次数。
英文摘要
Quantum comparators decide the order of two operands. They rely on reversible logic acting on basis-encoded integers, so their width grows with the precision. We introduce the Quantum Phase-based Comparator (QPC), which compares two values carried in relative phases instead. The circuit places the two phases, entered with opposite signs, between a pair of Hadamard gates, and a fixed offset centers the interference, so that the probability of measuring zero falls below one half exactly when the first phase is the smaller. We give two implementations. With hard-coded values, the two values are written into the parameters of two phase gates, and the comparison costs one qubit and five gates. With the register-driven cascade, the values are drawn from two $t$-qubit registers through binary-weighted controlled-phase gates, at a cost of one qubit beyond the registers and depth linear in $t$; since the cascade induces each phase linearly from the register content, one circuit handles a superposition of operand pairs. The readout yields a biased coin rather than a definite bit, and we quantify the shots that a decision takes at a given phase separation. Scaling both phases by an integer widens the decision margin at no cost in width or depth, and an adaptive doubling schedule turns this amplification into a shot count logarithmic in the inverse separation.
