AI 中文总结
本文针对SiC MOSFET短路耐受时间短的问题，分析并设计了三种DESAT保护电路架构，建立了定量噪声评估框架，提出平衡dv/dt噪声裕度与检测速度的设计方法，并通过实验验证。
AI 中文摘要
短路保护对于确保使用碳化硅（SiC）MOSFET的高功率密度功率变换器的安全运行至关重要。然而，由于SiC器件显著更短的短路耐受时间（通常小于3微秒），将最初为硅（Si）IGBT设计的传统退饱和（DESAT）保护进行适配具有挑战性。尽管如此，通过某些电路修改，DESAT保护可以适用于SiC MOSFET。本文对DESAT保护电路的三种架构变体进行了全面分析并提供了设计指南，特别针对调整适合SiC MOSFET的短路检测时间。此外，本文建立了一个定量框架，用于评估在关断dv/dt开关瞬变期间感应到DESAT保护电路中的噪声。基于此分析，为每种DESAT配置推导出设计方法和安全运行边界，指导系统性地选择元件值，以在SiC MOSFET的dv/dt噪声裕度和短路检测速度之间取得平衡。实验结果验证了该分析。
英文摘要
Short-circuit protection is vital for ensuring the safe operation of high-power-density power converters using Silicon Carbide (SiC) MOSFETs. However, adapting conventional desaturation (DESAT) protection, originally designed for Silicon (Si) IGBTs, is challenging due to the significantly shorter shortcircuit withstand time of SiC devices, typically less than 3μs. Nevertheless, DESAT protection can be adapted for SiC MOSFETs through certain circuit modifications. This article provides a comprehensive analysis and design guidelines for the three architectural variants of DESAT protection circuits, specifically for adjusting the short-circuit detection time suitable for SiC MOSFETs. Further, this article establishes a quantitative framework to evaluate the noise induced into the DESAT protection circuits during turn-off dv/dt switching transients. From this analysis, a design methodology and safe operating boundary are derived for each DESAT configuration, guiding the systematic selection of component values to balance dv/dt noise margin and short-circuit detection speed for SiC MOSFETs. Experimental results are presented to validate the analysis.
