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DVA-Neurons:自适应LIF神经元的设计与验证:从单神经元动力学到多神经元脉冲网络

DVA-Neurons: Design and Verification of Adaptive LIF Neurons: From Single-Neuron Dynamics to Multi-Neuron Spiking Networks

  • University of Maryland, Baltimore County(马里兰大学巴尔的摩县分校)

机构由 AI 辅助整理,请以论文原文为准。

Thanh Pham, Riadul Islam

AI总结:

本文提出并验证了自适应LIF神经元及其多神经元脉冲网络,通过二阶滤波和可配置权重实现发放调节,在14nm CMOS工艺下验证了面积功耗权衡与近线性扩展。

AI中文摘要:

脉冲神经网络(SNNs)通过模拟生物神经元的事件驱动计算,为超低功耗人工智能推理提供了一条有前景的路径。然而,两个挑战限制了其实际部署。首先,固定参数的漏积分发放(LIF)神经元缺乏生物学中观察到的适应机制,即神经元根据发放历史调节其兴奋性。其次,从单神经元扩展到多神经元网络引入了突触权重分配和神经元间脉冲路由的挑战,而这些在孤立设计中是不存在的。本文通过扩展、验证和物理实现自适应LIF神经元,在三个架构尺度上解决了这两个问题。本工作的贡献包括:一个具有两级突触滤波的二阶神经元,以提供更丰富的时域动态;一个具有可配置权重(100到5)的全连接6神经元脉冲网络,展示了基于权重的神经元间通信;以及一种直接验证方法,能够逐周期观察所有内部状态。所有设计均针对Selected Area Electron Diffraction(SAED)14纳米互补金属氧化物半导体(CMOS)工艺在1 GHz频率下进行综合,并使用基于Cocotb的Python测试平台在脉冲电流刺激(幅度80,ISI=3)下进行验证。结果表明,适应机制有效调节了发放:二阶神经元的发放抑制了31%(25次对36次),网络中突触后发放减少了31%(18次对26次)。物理上,二阶神经元比一阶基线多消耗1.77倍面积和1.52倍功耗,而6神经元网络表现出近线性扩展(5.7倍面积,5.3倍功耗)。本文记录了七个验证错误,涵盖测试平台连接、定点溢出和Verilog表达式宽度语义。

英文摘要:

Spiking Neural Networks (SNNs) offer a promising path toward ultra-low-power artificial intelligence inference by emulating the event-driven computation of biological neurons. However, two challenges limit their practical deployment. First, fixed-parameter Leaky Integrate-and-Fire (LIF) neurons lack the adaptation mechanisms observed in biology, where neurons modulate their excitability based on firing history. Second, scaling from single neurons to multi-neuron networks introduces challenges in synaptic weight distribution and inter-neuron spike routing that are absent in isolated designs. This paper addresses both issues through the extension, verification, and physical implementation of adaptive LIF neurons at three architectural scales. This work contributes: a 2nd-order neuron with two-stage synaptic filtering for richer temporal dynamics; a fully-connected 6-neuron spiking network with configurable weights (100 to 5) demonstrating weight-based inter-neuron communication; and a direct verification methodology enabling per-cycle observation of all internal states. All designs were synthesized targeting Selected Area Electron Diffraction (SAED) 14 nm Complementary Metal-Oxide-Semiconductor (CMOS) technology at 1 GHz and verified with Cocotb-based Python testbenches under pulsed current stimuli (amplitude 80, ISI=3). The results show that adaptation effectively modulates firing: 31% suppression in the 2nd-order neuron (25 vs.\ 36 spikes) and 31% reduction in postsynaptic firing in the network (18 vs.\ 26 spikes). Physically, the 2nd-order neuron costs 1.77x more area and 1.52x more power than the 1st-order baseline, while the 6-neuron network demonstrates near-linear scaling (5.7x area, 5.3x power). Seven verification bugs spanning testbench connectivity, fixed-point overflow, and Verilog expression-width semantics are documented.

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