基于深度神经网络的SCEP实验磁单极子搜索一级触发器
A Deep Neural Network based Level-1 Trigger for the Magnetic Monopole Search in the SCEP Experiment
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中文总结 AI 辅助
针对SCEP实验磁单极子搜索，提出基于MLP的模板库一级触发器，将净接受度从6.72%提升至8.79%，并在FPGA上实现实时处理。
中文摘要 AI 辅助
宇宙奇异粒子搜索（SCEP）实验提出了一种多层磁单极子（MM）探测阵列，目标曝光量为O(10^4)平方米·年。在此规模下连续记录原始波形每年将产生约O(10) EB的数据，使得全波形存储不切实际。因此，需要一级触发器来减少存储数据量，同时保留稀有MM信号。MM波形随粒子速度和轨迹变化，单一滤波核无法匹配所有可能的信号。核与信号波形之间的失配会降低探测概率。为此，本工作开发了一种紧凑的模板库构建方法用于MM探测。每个输入波形与库中所有核进行滤波，并从其响应中识别最佳匹配核。进一步开发了多层感知机（MLP）触发器，以组合所有模板响应并提高信号探测能力。在31样本窗口和存储数据比例为10^(-3)的条件下，MLP将平均净接受度P_net从传统模板库触发器的6.72%提高到8.79%，相对提升30.8%。随后，该网络在配备现场可编程门阵列（FPGA）的Xilinx AC701板上实现，以200 MHz触发逻辑处理采样率为1 MHz的20位输入波形。在目标存储数据比例下，定点实现相对于浮点参考仅使P_net降低3/(3.2×10^6)。板载测试复现了位精确的参考触发器输出，并持续维持1 MHz处理而无样本丢失，验证了基于FPGA的一级触发器的功能正确性和实时运行能力。
英文摘要
The Search for Cosmic Exotic Particles (SCEP) experiment proposes a multilayer magnetic monopole (MM) detection array with a target exposure of O(10^4) m^2 year. Continuously recording the raw waveforms at this scale would generate approximately O(10) EB of data per year, making full waveform storage impractical. A Level-1 trigger is therefore required to reduce the stored-data volume while retaining rare MM signals. MM waveforms vary with particle velocity and trajectory, so a single filter kernel cannot match all possible signals. A mismatch between the kernel and the signal waveform can reduce the detection probability. This work therefore develops a compact template-bank construction method for MM detection. Each incoming waveform is filtered with all kernels in the bank, and the best-matched kernel is identified from their responses. A multilayer perceptron (MLP) trigger is further developed to combine all template responses and improve signal detection. With a 31-sample window and a stored-data fraction of 10^(-3), the MLP increases the mean net acceptance P_net from 6.72% for the conventional template-bank trigger to 8.79%, a relative improvement of 30.8%. The network is then implemented on a Xilinx AC701 board equipped with a field-programmable gate array (FPGA) to process a 20-bit input waveform sampled at 1 MHz using 200 MHz trigger logic. At the target stored-data fraction, the fixed-point implementation reduces P_net by only 3/(3.2 x 10^6) relative to the floating-point reference. On-board tests reproduce the bit-accurate reference trigger outputs and sustain continuous 1 MHz processing without dropped input samples, verifying the functional correctness and real-time operation of the FPGA-based Level-1 trigger.
发表机构
- University of Science and Technology of China（中国科学技术大学）
- Deep Space Exploration Laboratory（深空探测实验室）
机构由 AI 辅助整理，请以论文原文为准。
