发表机构
Freie Universität Berlin; The University of Sydney; Okinawa Institute of Science and Technology（柏林自由大学; 悉尼大学; 冲绳科学技术大学院大学）
机构由 AI 辅助整理，请以论文原文为准。AI 中文总结
本文提出一个代数框架，通过上同调不变量高效采样容错非Clifford电路，估计逻辑故障率，开销与逻辑量子比特数无关，适用于大规模模拟。
AI 中文摘要
有用的量子计算需要通用门集的容错实现，而这些门集通常无法被高效模拟。我们设计了一个代数框架，能够高效地从实现Clifford层级第三层对角逻辑门的容错电路的测量分布中进行采样。在成功采样后，我们还提供了解码成功的充分条件。由此得到的逻辑故障率估计是一个高估，对于能容忍任意局部误差的模块，该估计会更加准确。非Clifford模拟的开销与逻辑量子比特的数量无关，这使得该方法特别适用于大规模模拟。该框架基于将电路中的非Clifford门视为底层时空故障复形的上同调不变量。该方法还可以与Clifford模拟器接口，以模拟更大的容错电路和算法子程序。
英文摘要
Useful quantum computation requires the fault-tolerant implementations of a universal gate set which are generically not efficiently simulable. We devise an algebraic framework that allows for efficient sampling from the measurement distribution of fault-tolerant circuits that implement diagonal logic gates in the third level of the Clifford hierarchy. Upon successful sampling we also provide sufficient conditions for decoding success. The resulting estimate for the logical failure rate is an overestimate, which becomes more accurate for blocks that are fault tolerant against arbitrary local errors. The non-Clifford simulation overhead is independent of the number of logical qubits, making the method particularly attractive for large-scale simulations. The framework is based on viewing the non-Clifford gates in the circuit as a cohomology invariant of an underlying spacetime fault complex. The method can also be interfaced with Clifford simulators to simulate larger fault-tolerant circuits and algorithmic subroutines.
Comments21 pages
