通过后端兼容温度升华分散剂降低碳纳米管晶体管的栅致漏极泄漏电流
Reducing the Gate-Induced Drain-Leakage Current of Carbon-Nanotube Transistors by Subliming Dispersants with Back-End-of-Line Compatible Temperature
浏览论文内容
中文总结 AI 辅助
本研究开发了一种低于250°C的可升华分散剂清洗工艺，用于碳纳米管晶体管，在不损伤形貌和晶格的前提下，将栅致漏极泄漏电流降低约一个数量级，并改善导通电流、亚阈值摆幅和阈值电压变异性，为低功耗碳纳米管电子学提供了实用路线。
中文摘要 AI 辅助
碳纳米管场效应晶体管（CNTFET）有望在后端（BEOL）工艺中与硅CMOS电路实现单片三维集成。进一步降低关态泄漏对于实际应用至关重要。在本研究中，我们开发了一种使用可升华碳纳米管分散剂的低温清洗工艺，用于碳纳米管沉积晶圆。该工艺在低于250°C的温度下进行，与BEOL兼容，并且不会恶化碳纳米管的形貌或晶格结构，这一点已通过原子力显微镜和拉曼光谱得到证实。因此，由残留分散剂引起的栅致漏极泄漏电流降低了约一个数量级。此外，清洗工艺后观察到导通电流、亚阈值摆幅和阈值电压变异性的改善。本研究展示了一种基于材料的途径来改善CNTFET的转移特性，并为低功耗碳纳米管电子学提供了一条实用路线。
英文摘要
Carbon nanotube field-effect transistors (CNTFETs) are promising for monolithic 3D integration with silicon CMOS circuits in back-end-of-line (BEOL) processes. Further reduction in off-state leakage is essential for practical applications. In this study, we develop a low-temperature cleaning process for CNT-deposited wafers using a sublimable CNT dispersant. The process is carried out below 250 °C, making it BEOL-compatible, and does not deteriorate CNT morphology or lattice structure, as confirmed by atomic force microscopy and Raman spectroscopy. As a result, gate-induced drain leakage current originating from residual dispersants is reduced by approximately one order of magnitude. In addition, improvements in on-current, subthreshold slope, and threshold voltage variability are observed after the cleaning process. This study demonstrates a material-enabled approach to improve the transfer characteristics of CNTFETs and provides a practical route toward low-power CNT electronics.
发表机构
- National Institute of Advanced Industrial Science and Technology (AIST)（产业技术综合研究所）
机构由 AI 辅助整理，请以论文原文为准。
