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基于量子解码器时序的FTQC硬件指纹识别

Hardware Fingerprinting FTQC via Quantum Decoder Timing

Friedrich Doku, Jakub Szefer, Kaitlin N. Smith

arXiv 2609.12145首次发表:更新:

发表机构

Northwestern University(西北大学)

机构由 AI 辅助整理,请以论文原文为准。

AI 中文总结

该研究首次发现容错量子计算中经典解码器的时序可作为侧信道,实现硬件指纹识别、码距推断及逻辑错误率估计,准确率最高达89%。

AI 中文摘要

随着量子计算领域向容错量子计算(FTQC)过渡,大量工作集中在扩展架构和实现主动纠错上。然而,这种转变引入了很大程度上尚未探索的安全表面。容错量子计算机将量子处理器与经典解码器配对,该解码器位于每一轮综合征提取的关键路径上。这项工作首次证明,每个解码器处理一次综合征测量和解码轮次所花费的墙钟时间构成了物理量子硬件上一种新颖的、可利用的硬件侧信道。利用从三台IBM Heron处理器在68天窗口内收集的逐次(per-shot)解码器时序,仅解码时间分布就允许被动观察者(i)重建逐次探测器触发分布并估计工作负载的逻辑错误率$p_L$,(ii)推断所使用的码距,以及(iii)以高达89%的准确率(随机猜测为33%)识别特定物理设备,合并的双样本Kolmogorov-Smirnov检验确认解码时间分布在统计上是不同的。在受谷歌105量子比特Willow处理器公开数据启发的噪声模拟中,解码器时序进一步以81%的准确率区分芯片上不同位置的9个表面码补丁,表明该侧信道在来自不同供应商和码族的低于阈值的容错硬件上仍然存在。

英文摘要

As the quantum computing field transitions toward Fault-Tolerant Quantum Computing (FTQC), intensive efforts are focused on scaling architectures and realizing active error correction. However, this shift introduces security surfaces that remain largely unexplored. Fault-tolerant quantum computers pair a quantum processor with a classical decoder that sits on the critical path of every syndrome-extraction round. For the first time, this work demonstrates that the wall-clock time each decoder takes to process a syndrome measurement and decoding round constitutes a novel, exploitable hardware side channel on physical quantum hardware. Using per-shot decoder timings from three IBM Heron processors collected over a 68-day window, the decode-time distribution alone allows a passive observer to (i) reconstruct the shot-by-shot detector-firing distribution and estimate the workload's logical error rate $p_L$, (ii) infer the code distance in use, and (iii) fingerprint the specific physical device with up to 89% accuracy (a random guess is 33%), with a pooled two-sample Kolmogorov-Smirnov test confirming the decode-time distributions are statistically distinct. In noisy simulation inspired by public data from Google's 105-qubit Willow processor, decoder timing further distinguishes 9 surface-code patches at different locations on the chip with 81% accuracy, showing the side channel persists on below-threshold fault-tolerant hardware from a different vendor and code family.

论文原文

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