发表机构
School of Physics, Huazhong University of Science and Technology（华中科技大学物理学院）
机构由 AI 辅助整理，请以论文原文为准。AI 中文总结
提出一种在后端工艺中利用垂直互连通孔内磁性填充材料工程化局部杂散场的方法，无需修改MTJ堆叠即可补偿偏置场，将写电流偏置比从21.6%降至1.3%，并在器件缩小时仍保持有效，适用于高密度SOT-MRAM集成。
AI 中文摘要
自旋轨道矩磁性随机存取存储器（SOT-MRAM）具有高速、超高耐久性以及与先进半导体工艺兼容等优点，使其成为下一代非易失性存储器的有力候选者。然而，磁隧道结（MTJ）中由参考层杂散场和层间耦合产生的固有偏置场，会导致临界开关电流不对称并增加能耗。现有的补偿方法通常会在MTJ堆叠中引入额外的磁性层，这增加了制造复杂性并限制了晶圆级集成。在此，我们提出一种无需修改MTJ堆叠的偏置补偿策略，通过在后端工艺中在垂直互连通孔（VIA）通道内利用磁性填充材料来工程化局部杂散磁场。微磁模拟表明，所提出的磁性填充层能够为确定性开关提供所需的辅助场，并显著抑制写电流不对称性。通过优化MTJ相对于磁性填充结构的位置，写电流偏置比从传统设计中的21.6%降至1.3%。该方法同样适用于面内磁各向异性SOT-MTJ，将偏置比从19.8%降至-0.2%。缩放分析进一步表明，当器件尺寸缩小至原始尺寸的20%（MTJ直径约10 nm）时，补偿效果仍然有效，这表明了其在高密度SOT-MRAM集成中的潜力。
英文摘要
Spin-orbit torque magnetic random-access memory (SOT-MRAM) offers high speed, ultrahigh endurance, and compatibility with advanced semiconductor processes, making it a promising candidate for next-generation nonvolatile memory. However, intrinsic bias fields in magnetic tunnel junctions (MTJs), originating from reference-layer stray fields and interlayer coupling, cause asymmetric critical switching currents and increased energy consumption. Existing compensation approaches usually introduce additional magnetic layers into the MTJ stack, which increases fabrication complexity and limits wafer-scale integration. Here, we propose a bias-compensation strategy without modifying the MTJ stack by engineering local stray magnetic fields through magnetic filling materials in vertical interconnect access (VIA) channels during the back-end-of-line process. Micromagnetic simulations show that the proposed magnetic filling layer can provide the required auxiliary field for deterministic switching and significantly suppress write-current asymmetry. By optimizing the MTJ position relative to the magnetic filling structure, the write-current bias ratio is reduced from 21.6% in the conventional design to 1.3%. The approach is also applicable to in-plane magnetic anisotropy SOT-MTJs, reducing the bias ratio from 19.8% to -0.2%. Scaling analysis further demonstrates that the compensation effect remains effective when the device size is reduced to 20% of the original dimension (MTJ diameter approximately 10 nm), indicating its potential for high-density SOT-MRAM integration.
CommentsEnglish translated version of the original Chinese paper published in Acta Physica Sinica. 17 pages, 13 figures, 1 table
Journal refActa Physica Sinica 75, 060807 (2026)
