发表机构
University of Cambridge; Nanofiber Quantum Technologies; The University of Tokyo; University of Oxford（剑桥大学; 纳米光纤量子技术; 东京大学; 牛津大学）
机构由 AI 辅助整理，请以论文原文为准。AI 中文总结
该研究提出一种面向中性原子的容错量子计算架构，通过协同设计布局、编译与解码，将量子比特丢失作为动态预算控制，显著降低逻辑错误率并提升容错性能。
AI 中文摘要
中性原子阵列是大规模容错量子计算（FTQC）的领先量子比特技术。该平台上的一个主要错误源是量子比特丢失，它在每次操作和移动中都会累积。丢失的存在削弱了现有架构工作的承诺。标准纠错针对随机泡利错误，无法纠正丢失，因此大多数FTQC性能分析不能直接与其兼容。此外，编译和路由决策强烈影响整体丢失，但通常针对泡利错误成本模型进行优化，且往往对丢失不敏感，可能增加对丢失通道的暴露。在本工作中，我们全面建模了量子比特丢失对中性原子FTQC的影响，并开发了一种容忍丢失的横向门架构。我们不将丢失视为预定的错误参数，而是将其视为整个程序消耗的动态预算，从而通过协同设计布局、编译和解码来控制它。我们针对无独立存储和纠缠区的物理实现，消除了在其他布局中主导丢失的重复SLM-AOD交接和长距离穿梭。我们开发了编译器优化，在尊重射频音调预算和AOD带宽约束的同时最大化门并行性。我们的工作将这些与丢失感知的延迟擦除解码器和端到端的丢失感知魔态培育协议相结合。总体而言，我们将每次综合征提取轮的累积丢失相对于分区基线提高了最多2.15倍，并将逻辑错误率相对于当前架构降低了两个数量级以上。我们的框架还为具体设备目标提供了信息，如连续重载率、AOD数量和穿梭轨迹选择。我们期望这些见解对中性原子硬件扩展时的系统架构师具有重要意义。
英文摘要
Neutral-atom arrays are a leading qubit technology for large-scale, fault-tolerant quantum computing (FTQC). A dominant error source on this platform is qubit loss, which accrues with every operation and movement. The presence of loss undermines the promises of existing architectural work. Standard error correction targets stochastic Pauli errors and cannot correct loss, so most FTQC performance analyses are not directly compatible with it. Moreover, compilation and routing decisions, which strongly affect overall loss, are typically optimized against Pauli-error cost models and often remain loss-agnostic, potentially increasing exposure to the loss channel. In this work, we comprehensively model the effect of qubit loss on neutral-atom FTQC and develop a loss-tolerant transversal-gate architecture. We treat loss not as a predetermined error parameter but as a dynamic budget spent across a whole program, allowing us to control it by co-designing layout, compilation, and decoding. We target a physical implementation with no separate storage and entangling zones, eliminating the repeated SLM-AOD handoffs and long-distance shuttling that dominate loss in other layouts. We develop compiler optimizations that maximize gate parallelism while respecting the RF tone budget and AOD bandwidth constraints. Our work couples these with a loss-aware, delayed-erasure decoder and an end-to-end loss-aware magic state cultivation protocol. Overall, we improve accumulated loss per syndrome-extraction round by up to 2.15X against a zoned baseline and reduce logical error rates by over two orders of magnitude versus current architectures. Our framework also informs concrete device targets such as continuous reloading rates, AOD counts, and shuttling trajectory choices. We expect these insights to matter for system architects as neutral-atom hardware scales.
