发表机构
Delft University of Technology; KU Leuven（代尔夫特理工大学; 荷语鲁汶大学）
机构由 AI 辅助整理，请以论文原文为准。AI 中文总结
FlexSpIM是一种数字存内计算加速器，通过支持任意操作数分辨率和层间混合驻留数据流，在IBM DVS手势数据集上实现95.8%准确率，并降低45%能耗和52%延迟。
AI 中文摘要
用于脉冲神经网络（SNN）的存内计算（CIM）加速器为实现边缘视觉应用中微秒级推理延迟和超低能耗提供了有前景的解决方案。然而，它们在电路和系统层面的有限灵活性限制了其在不同工作负载中的部署。这项工作提出了FlexSpIM，一种数字CIM架构，支持在权重和神经元状态（即膜电位）的统一存储中实现任意操作数分辨率和形状。这些电路级能力实现了层级的混合权重驻留和输出驻留数据流，最大化操作数重用，并减少SNN执行过程中昂贵的片上及片外数据移动。在40纳米CMOS工艺中制造的原型FlexSpIM的测量结果表明，与先前固定精度的基于数字CIM的SNN加速器相比，其具有竞争力的1位归一化能效和更高的吞吐量，同时提供逐位分辨率重构。在IBM DVS手势数据集上评估，FlexSpIM实现了95.8%的准确率，同时与固定驻留方法相比，在大规模系统中实现了高达45%的能耗降低和52%的延迟降低。
英文摘要
Compute-in-memory (CIM) accelerators for spiking neural networks (SNNs) offer a promising solution for achieving $μ$s-level inference latency and ultra-low energy in edge vision applications. However, their limited flexibility at both circuit and system levels restricts their deployment across diverse workloads. This work introduces FlexSpIM, a digital CIM architecture supporting arbitrary operand resolution and shape within a unified storage for weights and neuron states (i.e., membrane potentials). These circuit-level capabilities enable a layer-level hybrid weight- and output-stationary dataflow, maximizing operand reuse and reducing costly on- and off-chip data movement during SNN execution. Measurement results from a fabricated FlexSpIM prototype in 40-nm CMOS demonstrate competitive 1-bit-normalized energy efficiency and higher throughput compared with prior fixed-precision digital CIM-based SNN accelerators, while providing bitwise resolution reconfiguration. Evaluated on the IBM DVS gesture dataset, FlexSpIM achieves 95.8% accuracy while enabling up to 45% energy and 52% latency reductions in large-scale systems compared with fixed stationarity approaches.
Comments14 pages, 17 figures, 2 tables
