发表机构
Carnegie Mellon University; University of Michigan; Stanford University; University of California, Santa Barbara（卡内基梅隆大学; 密歇根大学; 斯坦福大学; 加州大学圣塔芭芭拉分校）
机构由 AI 辅助整理，请以论文原文为准。AI 中文总结
提出28nm四芯片数字伊辛加速器，含27,648自旋，通过时分复用和调度传输达41.5G更新/秒，1.2pJ/更新，Pegasus连接和10位系数提升精度，3.3微秒求解27,069节点MaxCut。
AI 中文摘要
我们提出了一款28nm数字伊辛加速器，其四个芯片上集成了27,648个自旋。采用具有本地SRAM和调度芯片间传输的时分复用自旋更新阵列，实现了41.5G更新/秒的吞吐率，每次更新能耗为1.2pJ。与8度、5位多芯片退火器相比，15度Pegasus连接性和10位系数增强了原生连接性和精度。可编程耦合支持优化和概率逻辑，在四芯片植入式MaxCut轨迹中，3.3微秒内为27,069个节点找到了解。
英文摘要
We report a 28 nm four-chip Ising accelerator with 27,648 spins, degree-15 Pegasus connectivity, and 10b coefficients. Boundary-state streaming overlaps interchip transfers with spin updates, achieving 98.03% simulated weak-scaling efficiency. At 140 MHz, the four-chip system delivers 30.24G peak updates/s at 1.2 pJ/update including I/O power, with 11.5$\times$ the throughput and approximately one-quarter the logic-plus-SRAM area per spin of a prior 28 nm multichip design. We demonstrate MaxCut, spin glass, frustrated loops, factorization, and 3SAT.
Comments12 pages, 7 figures
