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揭示CFET中通过有源区漏极合并(DMtA)的扩展潜力:突破超级通孔瓶颈并解锁新的PPA提升

Unveiling the Scaling Potential of Drain Merge through Active (DMtA) in CFETs: Breaking the Super-Via Bottlenecks and Unlocking New PPA Boosters

Jingru Jiang, Haoran Lu, Kairong Guo, Yibo Zhang, Yifei Chen, Wanyue Peng, Yu Liu, Jiacheng Sun, Xiaoyan Xu, Ming Li, Yibo Lin, Runsheng Wang, Ru Huang, Heng Wu

arXiv 2609.07329首次发表:更新:

发表机构

School of Integrated Circuits, Peking University(北京大学集成电路学院)

机构由 AI 辅助整理,请以论文原文为准。

AI 中文总结

本研究通过DTCO框架系统评估CFET中通过有源区漏极合并(DMtA)技术,发现其相比传统DMtF可提升RO频率11.7%,并借助有源区加宽和面积借用使内核频率提升34.8%,同时实现Hyper-cells、降低功耗5.3%并减少面积25.7%。

AI 中文摘要

漏极合并(DM)是一种在互补场效应晶体管(CFET)中垂直连接堆叠的n/pFET公共源/漏端子的超级通孔,它阻碍了进一步的寄生优化和单元缩放。本研究首次通过一个全面的DTCO框架,系统性地研究了最先进的通过有源区漏极合并(DMtA)技术——该技术最近被报道,将DM嵌入有源区,涵盖工艺集成、依赖接触配置的(CTCD)紧凑建模、标准单元设计、环形振荡器(RO)评估以及基于32位RISC-V Ibex内核的模块级PPA基准测试。通过减少DM寄生效应并实现DM宽度优化,DMtA相较于传统的通过场区漏极合并(DMtF)技术,将RO频率提高了11.7%。有源区加宽和面积借用(后者首次在文献[8]中报道,利用相邻单元中的空间余量进一步扩大纳米片宽度WNS)使Ibex内核最大频率提升了高达34.8%。更重要的是,DMtA通过合并相邻单元行间的有源区,使得曾经仅限GAA的Hyper-cells能够在CFET上实现,进一步带来8.7%的频率增益。一种布线后浮空输出引脚感知优化进一步移除了冗余的源/漏接触(CT),功耗降低了5.3%。最后,DMtA通过保持单行单元兼容性,促进了更具面积效率的2.5T单元缩放,使布线后内核面积减少了25.7%。

英文摘要

Drain merge (DM), a super via vertically connecting the common S/D terminals of stacked n/pFETs in Complementary FETs (CFETs), blocks further parasitic optimization and cell scaling. For the first time, this work systematically investigates the state-of-the-art Drain Merge through Active (DMtA), a revolutionary technology reported recently with the DM embedded in the active region, through a comprehensive DTCO framework spanning process integration, contact-configuration-dependent (CTCD) compact modeling, standardcell design, RO evaluation and block-level PPA benchmark on a 32-bit RISC-V Ibex core. By reducing DM parasitics and enabling DM-width optimization, DMtA improves RO frequency by 11.7% over its conventional Drain Merge through field (DMtF) counterpart. Active widening and Area Borrowing, the latter first reported in [8] and exploiting spatial slack in adjacent cells to further enlarge the nanosheet width (WNS), increase the maximum Ibex-core frequency by up to 34.8%. More importantly, DMtA also enables the once GAA-exclusive Hyper-cells on CFETs by merging the active regions across adjacent cell rows, providing a further 8.7% frequency gain. A post-routing floating-output-pin-aware optimization further removes redundant S/D contacts (CTs) and reduces power by 5.3%. Finally, DMtA facilitates more area-efficient 2.5T cell scaling by preserving single-row cell compatibility, reducing post-PR core area by 25.7%.

论文原文

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