发表机构
University of Rome Tor Vergata（罗马托尔维加塔大学）
机构由 AI 辅助整理，请以论文原文为准。AI 中文总结
提出网格检查点技术，通过分离内存更新拦截与映射管理，实现推测性仿真中低开销的增量检查点，并嵌入PARSIR验证其有效性。
AI 中文摘要
我们提出了一种用于推测性仿真中应用透明增量检查点的新技术，称为网格检查点（Grid Checkpointing）。通过我们的方案，我们将内存更新操作的拦截与内存映射管理完全分离。这使得能够通过极其有限的插桩指令集来追踪仿真对象状态中发生的内存更新。在方法论层面，我们的方案利用覆盖在用于承载对象状态块的内存区域上的叠加网格布局，并管理简洁的数据以实现增量检查点，而无需知道哪些块在对象状态中真正被分配或更新。此外，网格检查点完全避免了记录被触及内存区域的地址，而其他现有方案则需要进行此类记录。我们将我们的解决方案嵌入到PARSIR（并行仿真运行器）开源软件包中，并报告了一项实验研究的结果，该研究将网格检查点与文献中可用的其他解决方案进行了比较。结果表明，我们的方法通过内存更新追踪实现了增量检查点，且运行时开销几乎可以忽略不计。
英文摘要
We present a new technique for application-transparent incremental checkpointing in speculative simulation, referred to as {\em Grid Checkpointing}. With our proposal, we fully separate the interception of memory update operations from memory-map management. This enables tracing memory updates that occur in the state of a simulation object via an extremely limited set of instrumentation instructions. At the methodological level, our proposal exploits an overlaid grid layout on the memory area used to host the chunks of an object state, and manages concise data for enabling incremental checkpointing with no need for knowing which chunks are really allocated/updated into the object state. Additionally, grid checkpointing fully avoids logging the addresses of the touched memory zones, as instead takes place in other existing proposals. We embedded our solution into the PARSIR (PARallel SImulation Runner) open source package and report the results of an experimental study that compares grid checkpointing with other solutions available in the literature. The results demonstrate that our approach enables incremental checkpointing via memory update tracing with nearly negligible runtime cost.
