多模高斯变换的内存最优顺序合成

中文摘要 AI 辅助

在模块化量子计算架构中，硬件模块间的通信由传输线传送的行进量子化模式（qumodes）介导。每个输出qumode仅通过分束器型相互作用与发射模块作用一次，发射后该模块便无法再访问此qumode。因此，后续输出所需的信息必须保留在长寿命内存qumodes中。对于N个qumode上规定的多模高斯变换，本工作确定了任意给定发射顺序下的最小内存成本，构建了达到该最小值的显式顺序协议，并开发了一种用于识别内存高效发射顺序的贪心方法。该变换由辛矩阵S表示，可直接指定或通过高斯门序列指定。精确的最小内存成本由S的子矩阵的秩得到，进一步简化为基于支撑集的计数规则，其计算成本与支撑集数据的大小呈线性关系。当S直接指定时，基于矩阵的协议可达到最小内存成本；若S通过门序列指定，则可复用原始门而无需额外合成，不过由此产生的内存使用量未必最小。在D维立方晶格上具有局部支撑的高斯变换，可使用O(N^((D-1)/D))个内存qumodes顺序实现。这些协议也适用于非高斯输入，包括GKP态和猫态，从而为通用连续变量量子计算的模块化架构中的模块间通信提供了一种显式、资源高效的方案。

英文摘要

In modular quantum computing architectures, communication between hardware modules is mediated by traveling qumodes sent through transmission lines. Each output qumode interacts with the emitting module only once through a beam-splitter-type interaction and becomes inaccessible to that module after emission. Information required for subsequent outputs must therefore remain in long-lived memory qumodes. For a prescribed multimode Gaussian transformation on $N$ qumodes, this work determines the minimum memory cost for any given emission order, constructs an explicit sequential protocol attaining this minimum, and develops a greedy method for identifying memory-efficient emission orders. The transformation is represented by a symplectic matrix $S$, specified either directly or through a Gaussian gate sequence. The exact minimum memory cost is obtained from the ranks of submatrices of $S$ and further reduces to a support-based counting rule whose computational cost is linear in the size of the support data. When $S$ is specified directly, a matrix-based protocol attains the minimum memory cost. If instead $S$ is specified through a gate sequence, the original gates can be reused without additional synthesis, although the resulting memory usage need not be minimal. Gaussian transformations with local support on a $D$-dimensional cubic lattice can be realized sequentially with $O(N^{(D-1)/D})$ memory qumodes. The protocols also apply to non-Gaussian inputs, including GKP and cat states, and thereby provide an explicit, resource-efficient scheme for intermodule communication in modular architectures for universal continuous-variable quantum computation.

发表机构

• North Carolina State University（北卡罗来纳州立大学）

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