AI 中文总结
针对多核实时系统的共享内存竞争干扰问题，提出基于模型的自动部署方法，通过工具扩展应用并协调执行，经 RISC-V 多核系统航空电子案例验证可行。
AI 中文摘要
实时系统不断增长的吞吐量需求，以及功能向少数高性能平台的整合，推动了向并行架构的转变。多核实时系统面临的核心挑战是共享内存访问竞争带来的干扰。分阶段执行方法通过将共享内存访问限制在互斥的内存阶段，同时将计算限制在每个核心的本地内存中，来应对这一挑战。然而，管理和调度这些内存阶段的复杂性阻碍了分阶段执行在实时应用中的采用。为解决这一挑战，我们提出一种基于模型的部署方法，该方法可自动完成应用适配分阶段执行的过程。我们提出一种集成的基于工具的部署流程，该流程通过必要的内存阶段扩展应用，并提供运行时环境以协调目标硬件平台上的执行。我们的方法对应用实现的改动极小，因为部署工具可直接从生成的应用二进制文件中提取所需信息。我们在 RISC-V 多核系统上使用航空电子案例研究验证了我们的方法，展示了其关键组件和操作原理。
英文摘要
The increasing throughput demands in real-time systems and the consolidation of functionality on few, high-performance platforms are driving a shift towards parallel architectures. A key challenge for multicore real-time systems is the interference from contention for access to shared memory. Phased execution approaches address this challenge by restricting shared memory access to mutually exclusive memory phases, while computation is limited to memories local to each core. However, the complexity of managing and scheduling said memory phases hinders the adoption of phased execution in real-time applications. To address this challenge, we propose a model-based deployment methodology that automates the process of adapting applications to phased execution. We present an integrated tool-based deployment process that extends the application through the necessary memory phases and provides a runtime environment to orchestrate execution on the target hardware platform. Our approach requires minimal changes to the application implementation since the deployment tool directly extracts the required information from the generated application binaries. We validate our methodology using an avionics case study on a RISC-V multicore system, showcasing its key components and principles of operation.
Journal ref2025 IEEE 18th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), pp. 554-561
DOI：10.1109/MCSoC67473.2025.00092
