AI 中文总结
该研究提出软硬件协同设计的SMT核心池化技术,将低延迟应用纳入多区域可再生能源负载转移,使低延迟VM卸载量降80%、p90延迟变异系数降43.81%,最坏延迟折损11.97%。
AI 中文摘要
跨地理区域进行负载转移以追踪间歇性可再生能源的可用性,是减少云基础设施碳足迹的常用手段,但由于连接各区域的广域网(WAN)存在高延迟方差,该方法常将低延迟应用排除在外。本文旨在通过最小化低延迟应用跨WAN的转移,将其纳入负载转移范畴,提出一种软硬件协同设计的技术。硬件层面,在两个原本相同的服务器池中,通过深度闲置物理核心来匹配可再生能源供应的峰谷,其中一个服务器池的CPU启用同时多线程(SMT),从而在能源供应动态变化时获得一组静态逻辑核心,降低工作负载转移的概率;软件层面,在区域内为低延迟应用高效追踪这组静态核心,同时优先处理尽力而为型应用以满足跨WAN的转移需求。该技术利用SMT核心因硬件多线程带来的较低性能折损,通过OpenStack和CPU空闲状态实现,并基于带有Azure虚拟机到达轨迹的真实实验测试床评估性能。结果显示,低延迟虚拟机的卸载量减少80%,第90百分位(p90)端用户延迟的变异系数降低43.81%,而因SMT核心导致的最坏情况延迟折损为11.97%。
英文摘要
Load shifting across geographic regions to chase intermittent renewable energy availability is commonly used in reducing cloud infrastructure carbon footprint. However, it often omits low-latency applications due to high latency variances of wide area networks (WAN) that interconnect regions. This paper addresses accommodating low-latency applications into load shifting by minimizing their shifting across the WAN. We propose a technique using a hardware-software co-design approach. At the hardware level, we conduct server load matching over renewables supply peaks and valleys by deep idling physical cores in two otherwise identical server pools, with one enabling simultaneous multi-threading (SMT) in CPUs. In return, we achieve a static set of logical cores amidst energy supply dynamics, reducing the probability of workload shifting. At the software level, we efficiently chase the static set of cores for low-latency applications within regions while prioritizing best-effort applications to accommodate shifting requirements across WANs. Our approach exploits the lower performance compromise of SMT cores due to their hardware multi-threading. We implement the proposed technique with OpenStack and CPU idle states and evaluate its performance on a real experimental testbed with Azure VM arrival traces. Results show an 80% reduction in offloading low-latency VMs and a 43.81% reduction in coefficient of variation of p90 end-user latency while having a worst-case latency compromise of 11.97% due to SMT cores.