发表机构
University of Bremen; École Polytechnique Fédérale de Lausanne (EPFL); University of Oxford; German Research Center for Artificial Intelligence GmbH（不来梅大学; 洛桑联邦理工学院; 牛津大学; 德国人工智能研究中心有限公司）
机构由 AI 辅助整理，请以论文原文为准。AI 中文总结
本研究针对模块间依赖极噪贝尔对的分布式量子计算场景，扩展构造式容错框架，优化分布式稳定子测量电路，减少贝尔对用量并通过数值基准验证了性能。
AI 中文摘要
分布式架构被视为实现大规模量子计算机的途径，结合容错需求，这类架构需要分布式量子纠错（DQEC）与分布式逻辑门。一项重要挑战是，如何在模块间交互仅依赖共享贝尔对（其噪声远高于片上操作）的场景中实现DQEC基础模块。我们将“构造式容错”框架扩展至该场景，推导了处理额外噪声的不同策略：通过故障改进恢复了常规的纠缠蒸馏，还发现了更多可实现时空权衡的动态协议。研究表明，与采用单独解码的纠缠蒸馏相比，集成解码可将所需的蒸馏码距减半，因此显著减少了贝尔对的用量。作为本工作的核心重点，我们合成了分布式容错中一项重要基础模块——分布式稳定子测量的高效电路，这些电路可适配资源约束（如贝尔对生成速率或片上辅助量子比特的空间）。考虑到完整的局部容错并非总能维持逻辑错误率的正确缩放，我们还会根据周围环境优化电路。我们特别研究了表面码与颜色码，将其用作分布式存储器及跨独立模块的格点手术场景；在此类场景中，对特定 hook 错误与读出错误的鲁棒性，会进一步减少所需的贝尔对用量，相较于无上下文场景的用量更少。我们在包含额外互连噪声的电路级噪声下，对所得实现进行了数值基准测试。
英文摘要
Distributed architectures have been proposed as a pathway to large-scale quantum computers. Combined with the need for fault-tolerance, such architectures require distributed quantum error correction (DQEC) and distributed logical gates. An important challenge is how to realize DQEC primitives in the setting where interaction between modules is restricted to shared Bell pairs that are significantly noisier than on-chip operations. We extend the framework known as fault tolerance by construction to this setting, deriving different strategies for handling the additional noise. Through fault-improvement we recover conventional entanglement distillation, and also find more dynamical protocols that enable space-time trade-offs. We show that integrated decoding halves the required distillation code distance compared to entanglement distillation implemented using separate decoding, thus requiring significantly fewer Bell pairs. As a main focus of the work, we synthesize efficient circuits for an important primitive in distributed fault tolerance: distributed stabilizer measurements. These circuits can be adapted to resource constraints, e.g. on the Bell pair generation rate or the space available for on-chip auxiliary qubits. Noting that full local fault-tolerance is not always needed to preserve the correct scaling of logical error rates, we further optimize the circuits depending on the surrounding context. We consider in particular the surface code and the color code, both as distributed memories and in the case of lattice surgery across separate modules. Here, robustness to certain hook and readout errors reduces the number of required Bell pairs even further, compared to the context-free setting. We numerically benchmark the resulting implementations under circuit level noise with additional interconnect noise.
Comments69 pages, 31 figures
