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超图乘积码与提升乘积码的快速容错译码器

Fast Fault-Tolerant Decoders for Hypergraph Product and Lifted-Product Codes

Asit Kumar Pradhan, Nithin Raveendran, David Declercq, Bane Vasić

arXiv 2608.31040首次发表:更新:

发表机构

The University of Arizona(亚利桑那大学)

机构由 AI 辅助整理,请以论文原文为准。

AI 中文总结

该研究针对QLDPC码译码延迟瓶颈,设计直接解决稳定子诱导 trapping sets 的消息传递译码器,降低了LP码的译码复杂度,其逻辑错误率与BP+OSD相当或更低。

AI 中文摘要

我们为量子低密度奇偶校验(QLDPC)码设计了低复杂度的容错译码器,旨在降低译码延迟。我们针对电路级噪声模型下译码的两个主要瓶颈:(i)通过序统计译码(OSD)进行后处理;(ii)在伴随式提取过程中,为表示受控非门(CNOT)诱导的关联而引入的大量辅助变量节点。我们的关键发现是,传播的CNOT故障(“hook错误”)会产生稳定子诱导的 trapping sets(TS),这是超图乘积(HGP)和提升乘积(LP)构造固有的。因此,我们不再为每个此类故障建模显式关联节点并依赖OSD来清除由此产生的故障,而是设计了消息传递译码器,直接解决相应的稳定子诱导TS。我们通过从父经典LDPC码的译码器推导出QLDPC译码器,并将它们协同使用以校正广泛的稳定子诱导TS族,从而获得这些译码器。对于主要表现为伴随式错误的CNOT故障,我们表明其效果等效于数据错误与伴随式比特测量错误的组合。因此,给定重复测量和已包含表示伴随式比特错误节点的译码图,无需为每个CNOT故障设置单独的变量节点。使用仅包含表示数据错误和伴随式比特错误节点的现象学Tanner图,对LP码的仿真显示,与BP+OSD相比,逻辑错误率降低或相当,且译码复杂度显著更低。

英文摘要

We design low-complexity, fault-tolerant decoders for quantum low-density parity-check (QLDPC) codes with the goal of reducing decoding latency. We target two major bottlenecks of decoding under the \emph{circuit-level} noise model: (i) post-processing via order-statistics decoding (OSD), and (ii) the large number of auxiliary variable nodes commonly introduced to represent CNOT-induced correlations during syndrome extraction. Our key observation is that propagating CNOT faults (\emph{hook errors}) create \emph{stabilizer-induced} trapping sets (TSs) that are intrinsic to hypergraph-product (HGP) and lifted-product (LP) constructions. Therefore, instead of modeling each such fault with an explicit correlation node and relying on OSD to clean up the resulting failures, we design message-passing decoders that resolve the corresponding \emph{stabilizer-induced} TSs directly. We obtain these decoders by deriving QLDPC decoders from decoders for the parent classical LDPC codes and using them collectively to correct broad families of \emph{stabilizer-induced} TSs. For CNOT faults that manifest primarily as syndrome errors, we show that their effect is equivalent to a data error together with syndrome-bit measurement errors. Consequently, given repeated measurements and a decoding graph that already includes nodes representing syndrome-bit errors, no distinct variable node is needed for each CNOT fault. Using a \emph{phenomenological} Tanner graph with nodes representing only data errors and syndrome-bit errors, simulations on the LP codes show a reduction in, or comparable, logical error rates relative to BP+OSD, at substantially lower decoding complexity.

论文原文

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