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基于结构化行为建模的硅基SmartBAN实现

SmartBAN on Silicon by Structured Behavioral Modeling

Masato Yoshimi, Takahiro Ito, Kento Tanaka, Hirokazu Tanaka

arXiv 2608.29036首次发表:更新:

发表机构

Graduate School of Information Sciences, Hiroshima City University; Strategic Technology Center, Technology SBU, TISI Inc.; Graduate School of Informatics, Osaka Metropolitan University(广岛市立大学信息科学研究院; TISI公司技术SBU战略技术中心; 大阪公立大学情报研究院)

机构由 AI 辅助整理,请以论文原文为准。

AI 中文总结

本文针对SmartBAN标准未明确设备内部行为的问题,通过结构化行为建模完成其在nRF54L15 SoC上的实现,实验验证其具备低抖动、高投递率及自主恢复特性,并与BLE量化了确定性与效率的权衡。

AI 中文摘要

无线体域网(WBAN)是医疗物联网(IoMT)的关键使能技术。SmartBAN由ETSI标准化后成为IEC国际标准,定义了基于时分多址(TDMA)的物理层(PHY)和媒体接入控制层(MAC)的轻量级WBAN协议,但尚未有商业硬件实现的相关报道。该标准规定了帧格式和信道结构,但未明确设备内部行为:相位控制和连接生命周期缺乏转换逻辑,时隙级时序和调度策略缺乏参数化指导。本文通过结构化行为建模和模型驱动的实现解决这些问题。两个米利型有限自动机——一个用于Hub(3个状态、5个转换),一个用于每个Node(5个状态、8个转换)——将相位控制和连接生命周期捕获为硬件无关的设计蓝图,其转换表可直接映射到固件调度逻辑;时隙级时序和调度策略通过在nRF54L15(一款运行Zephyr实时操作系统(RTOS)的商用Arm Cortex-M33无线系统级芯片(SoC))上实现来解决。对16个并发调度的传感器节点进行25小时的实验验证了初始连接和上行数据路径的设计:所有13个建模转换均被执行,每个时隙的时序抖动小于1毫秒(99分位值P₉₉<754μs,且在16个时隙中与时隙无关),数据包投递率达99.99%,并具备自主断连恢复能力。将其与同SoC的蓝牙低功耗(BLE)进行比较,量化了确定性与效率的权衡:SmartBAN的时序抖动显著更低,但能耗更高,其中大部分能耗源于软件无线电处理而非协议级占空比。

英文摘要

Wireless body area networks (WBANs) are a key enabling technology for the Internet of Medical Things (IoMT). SmartBAN, standardized by ETSI and later adopted as an IEC international standard, defines a lightweight WBAN protocol with time-division multiple access (TDMA)-based physical (PHY) and media access control (MAC) layers, yet no implementation on commercial hardware has been reported. The standard specifies frame formats and channel structure but leaves internal device behaviors unspecified: phase control and connection lifecycle lack transition logic, while slot-level timing and scheduling policy lack parametric guidance. This paper addresses these omissions through structured behavioral modeling and model-driven implementation. Two Mealy-type finite automata -- one for the Hub (3 states, 5 transitions), one for each Node (5 states, 8 transitions) -- capture phase control and connection lifecycle as a hardware-independent design blueprint whose transition tables map directly to firmware dispatch logic; slot-level timing and scheduling policy are resolved through realization on the nRF54L15, a commercial Arm Cortex-M33 wireless system-on-chip (SoC) running Zephyr real-time operating system (RTOS). Experiments with sixteen concurrently scheduled sensor nodes over 25 hours validate the design for the initial connection and uplink data paths: all 13 modeled transitions were exercised with sub-millisecond per-slot timing jitter ($P_{99} <$ 754 $μ$s, slot-independent across all 16 slots), 99.99% packet delivery, and autonomous disconnection recovery. A same-SoC Bluetooth Low Energy (BLE) comparison quantifies the determinism-efficiency tradeoff: SmartBAN achieves substantially lower timing jitter at higher energy cost, the majority of which is attributable to software radio processing rather than the protocol-level duty cycle.

Comments8 pages, 6 figures, 7 tables. This work has been submitted for possible publication

论文原文

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