从生成到发现：用于电路与物理设计的扩散变异核
From Generation to Discovery: Diffusion Mutation Kernels for Circuit and Physical Design
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中文总结 AI 辅助
该研究提出基于扩散的发现框架，通过学习转移算子生成新电路设计，在三类电子设计任务中实现性能提升，且仅提供可行性结构，评估依赖外部工具。
中文摘要 AI 辅助
生成与发现是不同的问题：在有效人工制品上训练的生成模型会复现一种分布，而发现必须生成超出观测语料库的人工制品，满足严格的结构约束，并在模型无法影响的评估下改进现有设计。我们提出一种基于扩散的发现框架，与从学习到的分布中采样的传统生成模型不同，该框架学习将现有人工制品转化为新候选物的转移算子。受控的部分重加噪后去噪构成了扩散变异核，这是一种学习到的转移分布，在设计空间的区域间移动时保留可行设计的结构规律。学习到的模型仅提供可行性结构，所有正确性和性能判断仍由外部工程工具完成。中间扩散轨迹还会在共形风险预算下进行监控，以便在进行昂贵评估前丢弃无前景的候选物。我们在三个电子设计空间上评估该框架，这些空间提供了严格的不可微评估器，形式为仿真、形式等价性检查和工业物理实现。该框架发现的32位前缀加法器经形式验证与2^64个输入对上的加法完全等价，在布局布线流程中，相较于Kogge-Stone结构，延迟降低17%，面积减少18%；7种训练语料库中未包含的独立重仿真放大器拓扑，增益范围为21.9-66.1 dB，带宽范围为72.9 kHz-207 MHz；以及在保留的网表上的宏布局，达到工业布局器线长的0.68倍。
英文摘要
Generation and discovery are different problems. A generative model trained on valid artifacts reproduces a distribution, whereas discovery must produce artifacts that lie outside the observed corpus, satisfy hard structural constraints, and improve on established designs under evaluation that the model cannot influence. We introduce a diffusion-based discovery framework. Unlike conventional generative models that sample from learned distributions, it learns transition operators that transform existing artifacts into new candidates. Controlled partial re-noising followed by denoising defines a diffusion mutation kernel, a learned transition distribution that preserves the structural regularities of feasible designs while moving between regions of the design space. The learned model supplies feasibility structure only, and all correctness and performance judgments remain with external engineering tools. Intermediate diffusion trajectories are additionally monitored under a conformal risk budget so that unpromising candidates are discarded before expensive evaluation. We evaluate the framework on three electronic design spaces, an environment that supplies rigorous non-differentiable evaluators in the form of simulation, formal equivalence checking, and industrial physical implementation. The framework discovers 32-bit prefix adders that are formally verified equivalent to addition over all 2^64 input pairs and reduce delay by 17% and area by 18% relative to Kogge-Stone under a placed-and-timed flow; seven independently re-simulated amplifier topologies absent from the training corpus, spanning gains of 21.9-66.1 dB and bandwidths of 72.9 kHz-207 MHz; and macro placements on held-out netlists reaching 0.68x wirelength of an industrial placer.
