发表机构
Worcester Polytechnic Institute（伍斯特理工学院）
机构由 AI 辅助整理，请以论文原文为准。AI 中文总结
本研究针对分布式量子电路划分算法评估的缺口，通过开源自动化流水线评估发现，纠缠代价相当的划分算法会带来不同物理执行代价，证明需用全面电路级指标指导DQC编译器设计。
AI 中文摘要
分布式量子计算（DQC）通过将模块化量子处理单元（QPUs）联网，解决了单片量子处理器的物理扩展限制。在DQC架构上高效执行量子算法需要将算法跨QPUs编译，同时最小化QPUs间的通信瓶颈，这主要通过电路划分实现。然而，当前对最先进划分启发式算法的评估主要聚焦于划分的总纠缠代价，未能捕捉分布式网络约束引入的更广泛结构和时间开销。本文通过将已建立的单片基准测试指标应用于划分后的分布式电路，量化网络约束的性能影响，以解决这一评估缺口。我们使用开源自动化评估流水线，在标准化工作负载和量子网络拓扑上系统评估多种划分算法。实证结果表明，具有相当纠缠代价的划分算法仍会引入截然不同的物理执行代价，通过揭示电路深度大幅增加、门密度显著降低等隐藏权衡，本研究证明全面的电路级指标对指导未来DQC编译器设计至关重要。
英文摘要
Distributed Quantum Computing (DQC) addresses the physical scaling limitations of monolithic quantum processors by networking modular Quantum Processing Units (QPUs). Efficient execution of quantum algorithms on DQC architectures requires compiling them across QPUs while minimizing inter-QPU communication bottlenecks, primarily through circuit partitioning. However, current evaluations of state-of-the-art partitioning heuristics focus primarily on the total entanglement cost of the partitions, failing to capture the broader structural and temporal overheads introduced by distributed network constraints. This paper addresses this evaluation gap by applying established monolithic benchmarking metrics to partitioned distributed circuits to quantify the performance impact of network constraints. Using an open-source, automated evaluation pipeline, we systematically assess diverse partitioning algorithms across standardized workloads and quantum network topologies. Our empirical results reveal that partitioning algorithms with comparable entanglement costs can still introduce drastically different physical execution penalties. By exposing these hidden trade-offs, such as severe increases in circuit depth and substantial reductions in gate density, this study demonstrates that comprehensive circuit-level metrics are essential for guiding the future design of DQC compilers.
CommentsAccepted at IEEE QCE 2026 Workshop: Distributed Quantum Computing Systems and Infrastructure
