发表机构
University of Michigan（密歇根大学）
机构由 AI 辅助整理，请以论文原文为准。AI 中文总结
该研究提出一种LLM驱动的支持数据手册感知的自动化硬件兼容性验证框架，在早期嵌入式系统设计中实现97.5%的验证准确率，较“上传并查询”工作流减少8.6倍输入上下文大小，验证了模块化任务分解等方法的益处。
AI 中文摘要
我们提出了一种由大语言模型（LLM）驱动且支持数据手册感知的框架，用于早期硬件兼容性验证，该框架可基于硬件数据手册和高级组件连接描述识别文档层面的接口不兼容性。该框架无需详细的原理图仿真和实现，因此可在这些步骤之前使用。我们认为，可信赖的LLM辅助设计自动化并非直接从文档生成答案，而是通过可追溯的验证阶段转换工程信息。给定硬件数据手册和高级组件连接描述，该框架会构建捕获设备连接性和共享交互域的设计图，仅检索明确的面向领域的验证标准所需的工程属性，并生成用于兼容性评估的确定性脚本。通过将兼容性分析分解为模块化阶段并保留中间结果，该框架降低了上下文开销，提高了透明度和可追踪性，实现了可扩展性，并避免了依赖LLM进行数值计算。在包含34份数据手册的7个嵌入式系统设计上进行评估，我们的框架实现了97.5%的兼容性验证准确率，与“上传并查询”工作流相比，输入上下文大小减少了8.6倍。这些结果证明了在早期设计阶段进行LLM辅助的、基于规格的硬件兼容性验证的可行性，以及对模块化任务分解、形式化验证标准和任务感知紧凑上下文构建的需求和实质性益处。
英文摘要
We present an LLM-driven, datasheet-aware framework for early-stage hardware compatibility verification that identifies documentation-level interface incompatibilities based on hardware datasheets and high-level component connectivity descriptions. It does not require, and can therefore be used, before detailed schematic simulation and implementation. We view trustworthy LLM-assisted design automation not as directly generating answers from documents, but as transforming engineering information through traceable verification stages. Given hardware datasheets and high-level component connectivity descriptions, the framework constructs a design graph that captures device connectivity and shared interaction domains, retrieves only the engineering properties required by explicit, domain-oriented verification criteria , and generates deterministic scripts for compatibility evaluation. By decomposing compatibility analysis into modular stages and preserving intermediate results, the framework reduces context overhead, improves transparency and tractability, enables scaling, and avoids reliance on LLMs for numerical computation. Evaluated on seven embedded-system designs comprising 34 datasheets, our framework achieves 97.5% compatibility-verification accuracy and an 8.6 times reduction in input context size compared with ``upload-and-query'' workflows. These results demonstrate the feasibility of LLM-assisted, specification-based hardware compatibility verification at an early design stage, as well as the need for, and substantial benefits of, modular task decomposition, formalized verification criteria, and task-aware compact context construction.
