通过丰富的原生两量子比特门提升超导量子处理器的连通性瓶颈
Lifting connectivity bottlenecks in superconducting quantum processors via enriched native two-qubit gates
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中文总结 AI 辅助
本研究采用AshN控制方案，通过将量子比特路由与逻辑交互合并为原生操作，在一维、二维基准电路中减少45%左右两量子比特门数量，成功制备并认证八量子比特Dicke态，为缓解超导量子处理器连通性约束提供实用方法。
中文摘要 AI 辅助
有限的量子比特连通性是超导量子处理器的核心架构约束，其平面布局需要额外的门来介导远距离量子比特之间的相互作用。本文采用AshN控制方案，该方案对每一对近邻量子比特进行丰富的两量子比特控制，可将逻辑相互作用与所需的量子比特路由合并为单一原生操作，有效将稀疏的硬件图转化为连通性更强的计算架构。在研究的基准实例中，所得的合成能力可在受约束的一维和二维晶格上实现可靠执行，编译后的两量子比特门数量接近全对全连通参考的水平。在一维和二维拓扑结构的7个基准电路中，与基于受控-Z（CZ）的编译相比，基于AshN的实现分别实现了两量子比特门数量的几何平均减少45.2%和43.7%。使用AshN门，我们制备了保真度为0.736的八量子比特双激发Dicke态，并使用完全正部分转置见证（fully positive-partial-transpose witness）对其真正多体纠缠进行了认证，而相同的见证无法对基于CZ的实现进行纠缠认证。在测试的晶格配置中，包括最多存在3个连通缺陷的配置，该态的保真度和纠缠认证仍保持稳健。本研究确立了原生门工程作为缓解连通性约束的实用方法。
英文摘要
Limited qubit connectivity is a central architectural constraint in superconducting quantum processors, whose planar layouts require additional gates to mediate interactions between distant qubits. Here, we use the AshN control scheme, where rich two-qubit control on every nearest-neighbour pair allows a logical interaction and the required qubit routing to be merged into a single native operation, effectively transforming a sparse hardware graph into a more connected computational architecture. For the benchmark instances studied, the resulting synthesis capability enables reliable execution on constrained one- and two-dimensional lattices, with compiled two-qubit gate counts approaching those of an all-to-all-connected reference. Across seven benchmark circuits on one- and two-dimensional topologies, the AshN-based implementation achieves geometric-mean reductions of $45.2\%$ and $43.7\%$ in two-qubit gate count compared with controlled-Z-based compilation, respectively. Using AshN gates, we prepare an eight-qubit two-excitation Dicke state with a fidelity of $0.736$ and certify its genuine multipartite entanglement using a fully positive-partial-transpose witness, whereas the same witness does not certify entanglement for the CZ-based implementation. The state fidelity and entanglement certification remain robust across the tested lattice configurations, including those with up to three connectivity defects. Our work establishes native-gate engineering as a practical approach to mitigating connectivity constraints.
