AI 中文总结
该研究分析不同抽象层的硬件模糊测试技术，指出其未满足的需求，勾勒未来研究方向，以构建高效可靠的硬件验证方案。
AI 中文摘要
本研究对应用于指令集架构（ISA）、微架构和寄存器传输级（RTL）三大抽象层的当代硬件模糊测试技术开展了全面分析。研究考察了输入刺激质量、变异策略、反馈机制、目标平台、参考模型及覆盖度等关键因素，发现不同抽象层面临的挑战、目标与设计权衡存在显著差异。进一步识别出现有硬件模糊测试实践中未满足的多项需求，如智能输入生成、可靠可扩展的黄金参考模型、表达性反馈通道及跨层集成。基于上述洞见，本文勾勒了未来研究方向，包括混合模糊测试框架、AI辅助测试生成、可扩展参考模型、标准化评估指标与基准，以及用于引导探索与分析的人在回路自动化，旨在解锁高效、可靠且全面的硬件验证解决方案。
英文摘要
This work presents a comprehensive analysis of contemporary hardware fuzzing techniques applied across three major abstraction layers: Instruction Set Architecture (ISA), microarchitecture, and Register-Transfer Level (RTL). Our study examines key factors including input stimulus quality, mutation strategies, feedback mechanisms, target platforms, reference models, and achieved coverage. We find challenges, goals, and design trade-offs vary significantly across abstraction layers. We further identify several unmet needs in current hardware fuzzing practices, such as intelligent input generation, reliable and scalable golden reference models, expressive feedback channels, and cross-layer integration. Building on these insights, we outline future research directions, including hybrid fuzzing frameworks, AI-assisted test generation, scalable reference models, standardized evaluation metrics and benchmarks, and human-in-the-loop automation for guided exploration and analysis. Together, they aim to unlock efficient, reliable, and comprehensive hardware verification solutions.
