双侧栅极硅无结晶体管中电荷载流子迁移率的综合研究
A Comprehensive Study of Charge-Carrier Mobility in Double Lateral-Gate Silicon Junctionless Transistors
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中文总结 AI 辅助
该研究结合TCAD Sentaurus模拟与实验，分析气隙侧栅极双侧栅极硅无结晶体管的电荷载流子迁移率，揭示其低杂质散射等优势，为器件电荷转移提供全面认识。
中文摘要 AI 辅助
本文通过计算机模拟与实验结果结合的方式，深入概述了p型硅双侧栅极无结晶体管（DLGJLT）中的电荷载流子迁移率。该器件基于低掺杂绝缘体上硅衬底，采用原子力显微镜纳米光刻技术制备。由于其设计使用气隙侧栅极替代栅氧化层或结，使电流能通过轻掺杂硅沟道流动，这种结构减少了杂质散射，保护输运质量免受界面损伤。研究采用三维TCAD Sentaurus仿真工具建模器件的电性能，确认了跨导和漏极电导的实验数据，并尝试全面呈现器件内部的电荷转移情况。
英文摘要
We give in depth overview of charge-carrier mobility in p-type silicon double lateral-gate junctionless transistors (DLGJLT) through a mix of computer simulations and experimental results. The devices were built on low-doped silicon-on-insulator substrates using atomic force microscope nanolithography. Because the design uses air-gap side gates instead of a gate-oxide layer or junction, it allows electrical current to flow through a lightly doped silicon channel. This setup reduces impurity scattering and protects transport quality from interface damage. We used three-dimensional TCAD Sentaurus simulation tool to model the device's electrical behavior and confirm our experimental data for transconductance and drain conductance. We attempt to give a comprehensive view on the charge transition within the device.
