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中性原子阵列上高速率量子乘积码的架构与编译协同设计

Architecture and Compilation Co-Design for High-Rate Quantum Product Codes on Neutral Atom Arrays

Adrian Liu, Wan-Hsuan Lin, Daniel Bochen Tan, Qian Xu, Jason Cong

arXiv 2608.20164首次发表:更新:

AI 中文总结

针对中性原子阵列上qLDPC码编译的瓶颈,提出ONEX框架将二维计划分解为一维子问题,实现高时钟速率,可扩展至2500数据量子比特,适用于HGP及LP码族。

AI 中文摘要

实现实用规模的容错量子计算需要具有高编码率的量子纠错(QEC)码。量子低密度奇偶校验(qLDPC)码是很有前景的候选方案,尤其是在中性原子阵列兴起的背景下,这类阵列可通过原子移动提供动态长程连接。总体而言,为量子纠错合成有效且高效的物理执行计划是一个被证明的困难组合问题,形成了关键的编译瓶颈,且随着码尺寸增大而加剧。为克服这种复杂性,我们聚焦于具有降维特性的一类重要qLDPC码——乘积码,并提出了ONEX框架。该框架将复杂的二维物理执行计划分解为独立的一维子问题,每个子问题都能在实际编译时间内求解至最优执行深度。首先,我们用显式的可满足性模态理论(SMT)编码构建一维执行计划,该协议可生成被证明的深度最优解,且持续时间大幅缩短。其次,我们开发了一个多阶段编译流水线,具备 anytime 优化、移动压缩和迭代反馈功能,该流水线在保持实际时钟时间的同时,提供渐进式优化和按需获取优质解的能力。第三,我们在映射到中性原子阵列的超图乘积(HGP)码存储应用中评估ONEX,其时钟速率分别比构造性一维算法和通用二维编译器高出3.7倍至6.1倍、29.8倍至42.1倍,且能高效扩展至包含2500个数据量子比特的码。最后,我们将ONEX扩展到分区布局,揭示了相关权衡的架构见解,并通过一个代表性示例证明其适用于更广泛的提升乘积(LP)码族。

英文摘要

Achieving fault-tolerant quantum computing at a practical scale demands quantum error correction (QEC) codes with high encoding rates. Quantum low-density parity-check (qLDPC) codes emerge as a promising candidate, especially given the rise of neutral atom arrays that provide dynamic long-range connectivity via atom movements. In general, synthesizing valid and efficient physical execution plans for QEC is a provably hard combinatorial problem, forming a critical compilation bottleneck that worsens as code sizes grow. To overcome this complexity, we focus on an important product family of qLDPC codes with dimension-reduction properties, and propose ONEX. This framework decomposes complex 2D physical execution planning into independent 1D subproblems, each solved to optimal execution depth within practical compilation time. First, we formulate the 1D execution plan with an explicit satisfiability modulo theories (SMT) encoding. This protocol produces provably depth-optimal solutions with substantial duration reduction. Second, we develop a multi-stage compilation pipeline featuring anytime optimization, movement compaction, and iterative feedback. This pipeline maintains practical wall-clock times while providing progressive refinement and on-demand retrieval of quality solutions. Third, we evaluate ONEX in the application of hypergraph product (HGP) code memory mapped onto neutral atom arrays, achieving 3.7x to 6.1x and 29.8x to 42.1x higher clock rates than the constructive 1D algorithm and the general 2D compiler, respectively, while scaling efficiently to codes with 2,500 data qubits. Finally, we extend ONEX to zoned layouts, revealing architectural insights into the associated trade-offs, and demonstrate its applicability to the broader lifted-product (LP) code family through a representative example.

Comments20 pages, 16 figures

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