AI 中文总结
CTTE是一款开源双协议RISC-V追踪编码器，集成两种后端，经多RISC-V核验证，可降低追踪开销，支持源端进程过滤，相关资源已开源。
AI 中文摘要
RISC-V标准化了两种处理器追踪格式N-Trace与E-Trace，二者共享hart到编码器的指令追踪接口，但在压缩方式、消息类型及帧结构上存在差异。据我们所知，截至2026年8月，尚未有公开可用的可综合N-Trace编码器，也未出现过在同一前端后集成两种后端的已发表硬件编码器。我们提出CTTE（https://github.com/openhwgroup/ctte），这是一款开源SystemVerilog编码器，具备协议无关的前端，可选择N-Trace/Nexus或E-Trace后端。CTTE在两种指令追踪模式下均实现了N-Trace 1.0程序追踪消息集，支持参数化的N-Trace地址宽度，遵循RISC-V追踪控制接口，且在评估的N-Trace路径上，会在状态重新收敛前宣布输出带宽损失。CTTE已与来自5个供应商的6款RISC-V核集成。我们评估了运行Linux的64位RISC-V系统，包括双hart SMP系统，并演示了源端进程上下文过滤技术，该技术可在固定缓冲区中将目标进程的观察深度翻倍。验证工作结合了指令精确往返测试、RTL不变性检查、形式化模型检查以及带阴性对照的机器判定硬件测试。在硬件与配置保持不变的情况下，工作负载选择会使每条已提交指令的追踪开销在0.21到4.90比特之间变化。统一前端还支持受控的后端比较，同时可分离出需与线路格式效应区分开的同步与传输效应。RTL、寄存器源文件、测试用例、形式化属性、解码器扩展及构建脚本均根据CERN-OHL-S-2.0许可发布；专有集成可通过Accemic商业许可获取。
英文摘要
RISC-V standardizes two processor-trace formats, N-Trace and E-Trace, that share a hart-to-encoder instruction trace interface but differ in compression, messages, and framing. To the best of our knowledge, as of August 2026, no publicly available synthesizable N-Trace encoder and no published hardware encoder with both back ends behind a common front end have been reported. We present CTTE (CEDARtools.TraceEncoder), an open SystemVerilog encoder with a protocol-agnostic front end and selectable N-Trace/Nexus or E-Trace back ends. CTTE implements the N-Trace 1.0 program-trace message set in both instruction-trace modes, supports parameterized N-Trace address width, follows the RISC-V Trace Control Interface, and announces output-bandwidth loss before state re-convergence on the evaluated N-Trace path. CTTE has been integrated with six RISC-V cores from five suppliers. We evaluate 64-bit RISC-V systems booting Linux, including a two-hart SMP system, and demonstrate source-side process-context filtering that doubles observation depth for a target process in a fixed buffer. Verification combines instruction-exact round trips, RTL invariants, formal model checking, and machine-judged hardware campaigns with negative controls. With hardware and configuration held constant, workload choice changes trace cost from 0.21 to 4.90 bits per retired instruction. A common front end also enables controlled back-end comparisons while exposing synchronization and transport effects that must be separated from wire-format effects. RTL, register sources, tests, formal properties, decoder extensions, and build scripts are released under CERN-OHL-S-2.0; proprietary integration is available under an Accemic commercial license.
