基于RRAM电路的非线性预编码及比特精度分析
RRAM circuit-enabled nonlinear precoding and bit precision analysis
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中文总结 AI 辅助
本研究提出采用RRAM的IMC架构降低THP预编码复杂度，推导比特精度与SINR、速率的关系，仿真验证其可行性，为未来通信的高复杂度非线性预编码提供解决方案。
中文摘要 AI 辅助
用户和天线数量的不断增长，给未来通信系统带来了呈指数级增长的计算负载，而传统处理器因存算分离的特性面临瓶颈。存内计算（IMC）凭借其固有的高并行度成为有前景的解决方案。本研究提出一种采用阻变随机存取存储器（RRAM）的IMC架构，将非线性Tomlinson-Harashima预编码（THP）的计算复杂度降至线性规模。我们提出用于设计RRAM电路以执行非线性矩阵运算的计算约束原理，并构建了LQ分解RRAM电路。由于忆阻器的电导通常是量化的，我们进行了比特精度分析，推导了信干噪比（SINR）和可达速率的下界。分析表明，在高信噪比（SNR）或天线数量较多的情况下，每提升1比特精度可获得6dB的SINR增益和线性速率增长。针对实际实现，我们推导了在不同系统配置下维持SINR性能的最优比特精度。仿真验证了基于RRAM的电路及理论分析的可行性与准确性。本研究证明，基于RRAM的IMC在高复杂度非线性预编码领域具有巨大潜力，可满足未来通信不断升级的计算需求。
英文摘要
The rising number of users and antennas imposes exponentially growing computational loads on future communication systems. Yet conventional processors are facing a bottleneck for their nature of memory-computing separation. In-memory computing (IMC) emerges as a promising solution leveraging its intrinsic high parallelism. This work proposes an IMC architecture that employs resistive random access memory (RRAM) to reduce the computational complexity of the nonlinear Tomlinson-Harashima precoding (THP) to a linear scale. We present a computation-constraint principle for designing RRAM circuits to perform nonlinear matrix operations and construct an LQ decomposition RRAM circuit. Since the conductance of memristor is generally quantized, we perform the bit precision analysis and derive the lower bound of the Signal-to-Interference-plus-Noise Ratio (SINR) and achievable rate. Our analysis indicates that at a high Signal-to-Noise Ratio (SNR) or with a large number of antennas, each 1-bit precision increase yields 6 dB SINR gain and linear rate growth. For practical implementation, we derive the optimal bit precision to sustain SINR performance under varying system configurations. Simulation demonstrates the feasibility and accuracy of the RRAM-based circuit and our theoretical analysis. Our work proves that RRAM-based IMC holds significant potential for high-complexity nonlinear precoding, addressing the escalating computational demands for future communications.
