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在新兴RISC-V硬件上移植Chapel并进行基准测试:一项HPC可行性研究

Porting and Benchmarking Chapel on Emerging RISC-V Hardware: an HPC Viability Study

Ian Henriksen, Chris Taylor, Patrick Diehl, Jade Abraham, Palmer Cox, Bradford L. Chamberlain, Stephen L. Olivier

arXiv 2608.14799首次发表:更新:

AI 中文总结

本文研究Chapel在RISC-V硬件上的移植,通过基准测试对比多款RISC-V与HPC CPU平台的性能,为RISC-V用于HPC的可行性提供了初步依据。

AI 中文摘要

Chapel编程语言最近新增了对RISC-V架构的支持。本文探讨了Chapel在RISC-V上运行所需的修改,以及从移植过程中获得的经验教训。我们利用Chapel丰富的基准测试套件,进一步探究RISC-V架构对未来高性能计算(HPC)应用的适用性。我们在SiFive P550、Unmatched开发板以及Sophon SG2042上,将其性能与其他多款近期的HPC CPU平台进行了对比。不同架构上出现了各种可移植性和性能异常情况,本文将对此展开讨论。尽管这些RISC-V设备属于规模较小的初步产品,并非HPC级硬件,但这些结果仍为RISC-V硬件在不久的将来能在HPC领域具备可行性带来了希望。

英文摘要

The Chapel programming language recently added support for the RISC-V architecture. Here we discuss what changes were needed for Chapel to work on RISC-V as well as lessons learned from the porting process. We use some of Chapel's extensive benchmark suite to gain further insight into the suitability of the RISC-V architecture for future HPC use. We compare performance on SiFive P550 and Unmatched boards and a Sophon SG2042 with a variety of other recent HPC CPU platforms. Various portability and performance anomalies arose on different architectures and will be discussed. While the RISC-V machines represent smaller preliminary offerings and not HPC-class hardware, these results still provide hope that RISC-V hardware can become viable for HPC in the near future.

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