AI 中文总结
Uni-SFU是算法-硬件协同设计框架，通过混合度非均匀分段近似优化激活函数的SFU实现，在700+网络及3种NLP模型上验证，精度损失小于1.02%，面积仅6800um²，优于SOTA方案。
AI 中文摘要
非线性激活函数是现代深度神经网络（DNN）的核心组件，但其硬件评估会给GPU及定制加速器的特殊功能单元（SFU）带来极大压力。因此，在允许的误差范围内，通常采用分段多项式近似来提升计算效率。然而，现有技术往往采用固定次数多项式与均匀分段，对每个激活函数单独近似，导致硬件冗余与精度不足。为解决这些局限，本文提出Uni-SFU，一种算法-硬件协同设计框架，可针对多种激活函数联合优化近似精度与硅片面积。Uni-SFU通过跨所有目标函数的联合搜索，在RTL导出的面积成本模型引导下，为非均匀分段分配混合次数多项式，识别出在给定精度约束下实现目标激活函数的统一硬件配置。在700余种神经网络变体及3种自然语言处理（NLP）模型上验证，Uni-SFU的均方误差（MSE）低于8.22×10^-8，与浮点基线相比，top-1准确率下降控制在1.02%以内。该设计在GF 22nm CMOS工艺下仅占用6800平方微米的面积，与现有最优（SOTA）方案相比，在硅片面积与系统级精度间实现了更优的权衡。
英文摘要
Nonlinear activation functions are essential to modern deep neural networks (DNNs), but their hardware evaluation places significant pressure on the special-function units (SFUs) of GPUs and custom accelerators. Therefore, piecewise polynomial approximations are commonly used within allowed error bounds to improve computational efficiency. However, existing techniques often approximate each activation function in isolation using fixed-degree polynomials and uniform segments, leading to hardware redundancy and sub-optimal precision. To address these limitations, we present Uni-SFU, an algorithm-hardware co-design framework that jointly optimizes approximation accuracy and silicon area for a diverse set of activation functions. Uni-SFU leverages a joint search across all target functions to assign mixed-degree polynomials to nonuniform segments, guided by an RTL-derived area cost model. This approach identifies a unified hardware configuration to implement the target activation functions under given accuracy constraints. Validated across over 700 neural network variants and three Natural Language Processing (NLP) models, Uni-SFU achieves a superior Mean Squared Error (MSE) below 8.22x10^-8, limiting top-1 accuracy degradation to within 1.02% compared to floating-point baselines. The proposed design occupies only 6,800 um2 in GF 22nm CMOS technology, achieving a superior trade-off between silicon area and system-level accuracy compared to SOTA counterparts.
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