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arXiv 2608.11369quant-ph

玻色子编码中基于连续测量的完整量子门:GKP与猫态

Holonomic quantum gates via continuous measurement in bosonic codes: GKP and cat states

Juan Garcia-Nila, Anirudh Lanka, Todd A. Brun

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中文总结 AI 辅助

该研究将基于连续测量的完整量子计算应用于玻色子编码,为猫码和GKP码设计协议,实现无需哈密顿量控制的容错逻辑门,为玻色子平台的测量诱导完整控制提供具体方案。

中文摘要 AI 辅助

我们将基于连续测量的完整量子计算(CMHQC)应用于玻色子量子纠错码,为四分量猫码和Gottesman-Kitaev-Preskill(GKP)码开发了明确的协议。在该框架中,持续监测的含时编码空间在格拉斯曼流形上经历闭合轨迹,而芝诺约束抑制了其偏离瞬时编码空间的情况。对于猫码,我们构建了一类压缩猫轨迹,其投影的Wilczek-Zee联络可生成任意逻辑Z旋转,包括非克利福德T门。对于GKP码,我们引入了平移晶格轨迹,通过纯几何完整群实现了逻辑GKP T门。我们推导了对应的含时投影算子,解析计算了投影联络,并证明所得完整群可复现所需的逻辑操作,无需哈密顿量控制。此外,我们通过为相关玻色子误差模型建立修饰的Knill-Laflamme条件,分析了瞬时编码空间的纠错能力,并推导了有限强度连续测量诱导漏出的解析估计。我们的结果为实验相关的玻色子平台提供了测量诱导完整控制的具体实现,并确立了完全容错的逻辑门实现方案。

英文摘要

We apply continuous measurement-based holonomic quantum computation (CMHQC) to bosonic quantum error-correcting codes and develop explicit protocols for both four-component cat codes and Gottesman-Kitaev-Preskill (GKP) codes. In this framework, a continuously monitored time-dependent codespace undergoes a closed trajectory on the Grassmannian manifold while Zeno confinement suppresses departures from the instantaneous code subspace. For cat codes, we construct a family of squeezed-cat trajectories whose projected Wilczek-Zee connection generates arbitrary logical Z rotations, including non-Clifford T-gates. For GKP codes, we introduce a translated-lattice trajectory that realizes the logical GKP T gate through a purely geometric holonomy. We derive the corresponding time-dependent projectors, analytically evaluate the projected connections, and show that the resulting holonomies reproduce the desired logical operations without Hamiltonian control. Furthermore, we analyze the error-correcting capabilities of the instantaneous codespaces by establishing dressed Knill-Laflamme conditions for the relevant bosonic error models and derive analytical estimates for leakage induced by finite-strength continuous measurements. Our results provide a concrete realization of measurement-induced holonomic control in experimentally relevant bosonic platforms and establish a full fault-tolerant logical gate implementation.

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