Eco-SoC：面向可持续人工智能的可超大规模集成电路架构
Eco-SoC: A Sustainable VLSI Architecture for Energy-Proportional Artificial Intelligence
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中文总结 AI 辅助
本文提出面向可持续人工智能的Eco-SoC VLSI架构，通过动态精度缩放逻辑框架降低开关活动，结合生命周期评估抵消碳足迹，还通过热感知电源门控延长芯片寿命，实现电子废物缓解。
中文摘要 AI 辅助
在气候变化加剧、边缘智能广泛部署的时代，半导体制造与运行的环境成本已达到临界阈值。由于深度学习（DL）加速器占据了系统级芯片（SoC）的绝大部分管芯面积，要实现真正的可持续性，需从静态最坏情况能效向动态能量比例性转变。本文介绍Eco-SoC，这是一种专为可持续人工智能协同设计的高可扩展性超大规模集成电路（VLSI）架构。我们提出了硬件级动态精度缩放逻辑（DPSL）框架，该框架可根据实时激活稀疏性自适应调节位宽精度，在商用7nm FinFET工艺节点上成功将开关活动降低了多达42%。此外，我们通过使用架构碳足迹工具（ACT）提供全面的生命周期评估（LCA），突破了传统功耗-性能-面积（PPA）指标的局限。我们的综合结果表明，Eco-SoC在边缘部署的1.1年内即可抵消其增加的隐含碳足迹（仅为4.8%的边际面积开销）。最后，通过引入缓解局部热点的热感知电源门控机制，Eco-SoC使硅的预计平均无故障时间（MTTF）翻倍，为下一代计算系统中的电子废物（e-waste）缓解提供了切实可行的可扩展策略。
英文摘要
In an era defined by escalating climate change and the pervasive deployment of edge intelligence, the environmental cost of semiconductor manufacturing and operation has reached a critical threshold. As Deep Learning (DL) accelerators dominate System-on-Chip (SoC) die area, achieving true sustainability requires a paradigm shift from static worst-case efficiency to dynamic energy-proportionality. This paper introduces Eco-SoC, a highly scalable VLSI architecture co-designed specifically for sustainable artificial intelligence. We propose a hardware-level Dynamic Precision-Scaling Logic (DPSL) framework that adaptively modulates bit-width precision based on real-time activation sparsity, successfully reducing switching activity by up to 42% on a commercial 7nm FinFET process node. Furthermore, we transcend traditional Power-Performance-Area (PPA) metrics by providing a comprehensive Life Cycle Assessment (LCA) using the Architectural Carbon footprint Tool (ACT). Our synthesis demonstrates that Eco-SoC offsets its increased embodied carbon footprint (a marginal 4.8% area overhead) within 1.1 years of edge deployment. Finally, by introducing a thermal-aware power gating mechanism that mitigates localized hotspots, Eco-SoC doubles the projected Mean Time To Failure (MTTF) of the silicon, providing a tangible, scalable strategy for electronic waste (e-waste) mitigation in next-generation computing systems.
发表机构
- Microsoft Corporation（微软公司）
- Indian Institute of Technology Delhi（印度德里理工学院）
机构由 AI 辅助整理，请以论文原文为准。
