AI 中文总结
PowerScope是首个基于机器学习的周期内功耗估计框架，仅依赖RTL仿真轨迹，在保证精度的同时速度提升约80倍，可用于硅前功耗侧信道泄漏评估。
AI 中文摘要
亚时钟周期时间分辨率下的功耗估计对于功耗传输网络（PDN）设计、动态电压降分析以及硅前功耗侧信道安全评估等任务至关重要。设计人员通常依赖商用的布局后门级功耗分析工具完成这些任务，但这类流程计算成本高昂，且在设计规模和工作负载长度增加时扩展性较差。基于机器学习（ML）的功耗估计框架已展现出加速功耗估计的潜力，但现有研究仅能处理平均功耗或单周期功耗估计。本文提出PowerScope，这是首个基于机器学习的周期内功耗估计框架。PowerScope在推理阶段仅依赖RTL仿真轨迹运行，无需针对每个工作负载进行布局后门级仿真和功耗分析。在多样化的基准测试套件中，与商用布局后门级功耗估计结果相比，PowerScope实现了5.88%的中位数绝对百分比误差和9%的平均绝对百分比误差，同时运行速度提升约80倍。我们进一步验证，PowerScope的预测结果可可靠用于硅前功耗侧信道泄漏评估的下游任务。
英文摘要
Power estimation at sub-clock-cycle temporal resolutions is critical for tasks such as power delivery network (PDN) design, dynamic voltage droop analysis, and pre-silicon power side-channel security evaluation. Designers commonly rely on commercial post-layout gate-level power analysis tools for these tasks, but these flows are computationally expensive and scale poorly with design size and workload length. Machine learning (ML)-based power estimation frameworks have shown promise in accelerating power estimation, but prior efforts only address average power or per-cycle power estimation. We propose PowerScope, the first ML-based intra-cycle power estimation framework. PowerScope operates purely on RTL simulation traces at inference time, eliminating the need for post-layout gate-level simulation and power analysis per workload. Across a diverse benchmark suite, PowerScope achieves 5.88% median and 9% mean absolute percentage error compared to commercial post-layout gate-level power estimates while running ~80x faster. We further demonstrate that PowerScope's predictions can be reliably used for the downstream task of pre-silicon power side-channel leakage assessment.
