HSRAI：基于分层平衡度量的置换保留型地址交织
HSRAI: Permutation-Preserving Address Interleaving with Hierarchical Balance Metrics
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中文总结 AI 辅助
本文提出HSRAI地址交织方法，保留高低阶地址位，针对全域与剪枝拓扑分别采用GF(2)仿射搜索及CRT结合重映射，在128节点拓扑上实现双射、均衡及无饥饿，改善各层级流量指标
中文摘要 AI 辅助
地址交织用于平衡缓存、DRAM和GPU分区之间的带宽。在多级互连拓扑中，映射必须是逻辑地址与编码地址之间的一对一可逆对应关系，且在典型访问模式下，需保证每个层级的出口端口流量均匀，而非仅终端从节点。以随机访问为激励、终端均匀性为接受准则的方法对于级联互连不足；本文按访问模式优先级划分工作负载，要求全局双射且无从节点长时间未被访问。各层级出口流量通过层级变异系数（CV）、连续同端口运行长度和滑动窗口峰值占用率评估。HSRAI保留高阶地址位和行内低阶地址位，仅对中间索引段应用W位双射。全域拓扑采用离线GF(2)仿射搜索，矩阵和盐参数通过优先级排序的访问模式及各层级可接受性硬约束选取；剪枝拓扑结合中国剩余定理（CRT）与重映射。评估使用可复现的C++基准，涵盖线性流、矩阵分块和二维算术格。在128节点全域拓扑上，所提仿射映射满足双射、终端均衡、设计时可接受性阈值，且在高优先级接受集上无长窗口饥饿；固定异或及折叠/表基准暴露了中间层级热点或长零访问周期。剪枝拓扑中，CRT变体在线性和分块访问上显著改善各层级指标。工件：此https URL（标签paper-v11）
英文摘要
Address interleaving balances bandwidth across caches, DRAM, and GPU partitions. In a multi-level interconnect topology, the mapping must be a one-to-one, invertible correspondence between logical and encoded addresses and, under typical access patterns, keep traffic uniform at every level's egress ports, not only at terminal slave nodes. Using random access as the stimulus and terminal uniformity as the acceptance criterion is insufficient for cascaded interconnects; this paper partitions workloads by access-pattern priority and requires a global bijection with no slave node left unvisited for extended periods. Per-level coefficient of variation (CV), consecutive same-port run length, and sliding-window peak occupancy evaluate traffic at each level's egress. HSRAI preserves high-order and intra-line low-order address bits and applies a W-bit bijection only to the intermediate index segment. Full-domain topologies use offline GF(2) affine search with matrix and salt parameters selected via priority-ranked access patterns and per-level admissibility hard constraints; pruned topologies combine the Chinese Remainder Theorem with remapping. Evaluation uses a reproducible C++ benchmark covering linear streams, matrix tiling, and 2D arithmetic lattices. On the 128-node full-domain topology, the proposed affine map satisfies bijection, terminal balance, design-time admissibility thresholds, and zero long-window starvation on the high-priority acceptance set; fixed XOR and folding/table baselines expose intermediate-level hotspots or extended zero-access periods. For pruned topologies, the CRT variant significantly improves per-level metrics on linear and tiling accesses. Artifact: https://github.com/xiaotongyuan/hsrai_address_hash (tag paper-v11).
