AI 中文总结
该研究识别了模拟计算的动力学约束，定义了模拟库朗数，通过LTspice仿真验证了相关理论，为模拟硬件的算子速率限制提供了理论依据。
AI 中文摘要
本文识别了基于阻抗网络表示矩阵行的模拟计算方法的动力学约束。研究表明，最快的归一化模式不超过所有电路行中最大的组合单位增益带宽（CUGBW）的$2\pi$倍。一行的CUGBW等于其有限增益调整后的单位增益带宽，加上与其耦合的所有行的贡献；每个贡献为两行单位增益带宽乘积的平方根，乘以它们的耦合电导，再除以它们总电导负载乘积的平方根。该界限类似于时间步进方法中的库朗数限制，通过限制模拟硬件可在输出端物理表示和解析的算子速率发挥作用。该理论通过从CMOS到热离子真空管电路架构的大规模LTspice仿真得到验证，基准电路实现了一维热方程、基于图的半监督学习问题及图正则化回归。
英文摘要
This paper identifies a dynamical constraint on analog-computing approaches in which a row of the matrix is represented by an impedance network. It shows that the fastest normalized mode is no more than 2$π$ times the largest combined unity-gain bandwidth (CUGBW) among all the circuit rows. The CUGBW of a row equals its finite-gain-adjusted unity-gain bandwidth plus the contributions of all rows coupled to it. Each contribution is the square root of the product of the two rows' unity-gain bandwidths multiplied by their coupling conductance and divided by the square root of the product of their total conductance loadings. This bound plays a role analogous to the Courant-number restriction in time-stepping methods by limiting the operator rates that analog hardware can physically represent and resolve at its outputs. It is shown that in mixed-signal approach, the Courant metrics become stability criteria, and they must be less than 2 in order for the solver to remain stable. The theory is validated using large-scale LTspice simulations across architectures ranging from CMOS to thermionic vacuum-tube circuits. The benchmark circuits implement a one-dimensional heat equation, a graph-based semi-supervised learning problem, and a graph-regularized regression.
CommentsRevised Version of the Original Manuscript
