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对抗性:基于与非门图的大规模硬件木马检测

ADVERSARIAL: And-Inverter Graph-Assisted Hardware Trojan Detection At Scale

Yaroslav Popryho, Debjit Pal, Inna Partin-Vaisband

arXiv 2607.23882首次发表:更新:

发表机构

Synopsys, Inc.(新思科技公司)

机构由 AI 辅助整理,请以论文原文为准。

AI 中文总结

针对现代大规模SoC中硬件木马检测难题,提出基于与非门图的符号化学习方法,通过知识图谱嵌入框架表示连接,解决可扩展性瓶颈,能区分正常与潜在木马连接,实验验证了该方法在大规模SoC基准测试中的有效性和可扩展性。

AI 中文摘要

现代片上系统(SoC)通常包含数亿到数百亿个门电路,现有的硬件木马(HT)检测方法因规模巨大而不实用。本文提出的方法通过将扁平化门级网表建模为与非门图(AIG)表示的布尔网络来引入符号化学习,所有内部节点为2输入与门,反相在边上。每个有向连接在知识图谱嵌入(KGE)框架中表示为三元组,产生紧凑、固定大小的节点表示并保留多跳结构上下文。AIG的有限扇入和统一语义确保训练和推理复杂度随边数线性扩展,解决了HT检测中的主要可扩展性瓶颈。跨深度数据路径的符号化学习使模型能够区分电路结构与表示潜在木马触发和有效载荷的罕见且功能不一致的连接。在大规模SoC基准测试上的实验证明了木马节点和良性节点之间有明显的几何分离以及实际的可扩展性。

英文摘要

Modern System-on-Chip (SoCs) often contain hundreds of millions to tens of billions of gates, making existing Hardware Trojan (HT) detection methods impractical due to their immense scale. The proposed approach incorporates symbolically enabled learning by modeling flattened gate-level netlists as Boolean networks represented as And-Inverter Graphs (AIGs), where all internal nodes are 2-input AND gates and inversions reside on the edges. Each directed connection is expressed as a triple within a Knowledge Graph Embedding (KGE) framework, producing compact, constant-size per-node representations that retain multi-hop structural context. The AIG's bounded fan-in and uniform semantics ensure training and inference complexity scale linearly with edge count, addressing major scalability bottlenecks in HT detection. Symbolically enabled learning across deep datapaths enables the model to differentiate circuit structures from rare and functionally inconsistent connections that signify potential Trojan triggers and payloads. Experiments on large-scale SoC benchmarks demonstrate clear geometric separation between Trojan and benign nodes and practical scalability.

Comments9 pages, 5 figures, 3 tables. Accepted for publication at the IEEE/ACM International Conference on Computer-Aided Design (ICCAD 2026)

论文原文

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