二维磁通量子处理器中的电容负载
Mitigating Capacitive Loading Enables Fast Two-Qubit Gates in Highly Connected Fluxonium Quantum Processors
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中文总结 AI 辅助
研究二维磁通量子处理器中电容负载问题，通过推导解析关系确定其主要来源，据此制定设计原则并经数值验证，证明电容负载不构成二维磁通量子处理器的基本限制，实现了超快、高保真双量子比特门。
中文摘要 AI 辅助
电容负载已成为将磁通量子比特从一维扩展到高度连接的二维（2D）架构的主要障碍，但其物理起源仍知之甚少。我们推导了量子比特电容预算与到外部电路元件的可实现电容耦合之间的解析关系，确定约瑟夫森结和约瑟夫森结阵列的寄生电容是电容负载的主要来源，同时表明可以通过设计量子比特-焊盘几何结构来减轻它。基于这些见解，我们制定了实用的设计原则，并通过数值方法证明了二维磁通量子架构中的超快、高保真双量子比特门。我们的结果表明，电容负载并不构成二维磁通量子处理器的基本限制。
英文摘要
Fluxonium qubits combine long coherence times with strong anharmonicity, making them attractive for scalable superconducting quantum processors. Recent experiments have demonstrated high-fidelity two-qubit gates and multi-qubit entanglement in one-dimensional and connectivity-four fluxonium processors, motivating their extension to highly connected two-dimensional (2D) architectures. A central challenge in this extension is to achieve strong coupling to multiple circuit elements while preserving the finite capacitance budget of fluxonium qubits, which constrains the attainable qubit-qubit effective coupling strength and, consequently, two-qubit gate performance. Here, we establish a unified theoretical framework that identifies the connectivity-dependent upper bound on capacitive coupling and quantifies its reduction by distinct parasitic-capacitance channels, applicable across both fluxonium and transmon regimes. We show that pad-to-ground loading is primarily geometry limited and can be substantially suppressed through qubit-pad engineering, whereas inter-pad loading is ultimately constrained by parasitic capacitances of Josephson junctions and Josephson junction arrays. Building on these insights, we formulate practical design principles and numerically demonstrate two-qubit gates as fast as 27 ns and leakage-induced infidelity below $10^{-3}$ under representative fabrication variations in 2D fluxonium architectures. These results establish a quantitative framework for understanding and mitigating capacitive loading, suggesting that it does not impose a fundamental performance limit on highly connected fluxonium processors.
发表机构
- Quantum Science Center of Guangdong-Hong Kong-Macao Greater Bay Area（粤港澳大湾区量子科学中心）
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