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使用神经网络的跨导量子比特组件级逆设计

Component-Level Inverse Design of Transmon Qubits Using Neural Networks

Olivia Seidel, Firas Abouzahr, Abhishek Chakraborty, Sadman Ahmed Shanto, Saikat Das, Daniel Baxter, Jonathan Asaadi, Nicola Pancotti, Haoyu Yang, Brucek Khailany, Sara Sussman, Enectali Figueroa-Feliciano, Eli M Levenson-Falk, Taylor L. Patti

arXiv 2607.20795首次发表:更新:

AI 中文总结

研究使用神经网络工作流程将超导量子比特目标哈密顿量参数映射到组件级布局参数,经训练和验证,该方法生成可用几何结构,误差低,速度快,有效扩展和补充传统电磁模拟,尤其适用于小数据集。

AI 中文摘要

设计超导量子比特以实现特定哈密顿量参数通常需要在耗时且计算密集的正向循环中迭代,设计师选择布局几何结构、模拟、提取电容等电路参数并优化几何结构。我们使用神经网络工作流程研究此任务的逆问题,将目标哈密顿量参数直接映射到组件级布局参数,并在平面跨导布局上进行了演示。训练时,将逆模型与冻结的正向替代模型配对,在哈密顿量空间而非布局参数空间评估损失。与传统电磁求解器相比,97%的生成设计产生可用几何结构,逆模型加替代模型管道在量子比特频率上的平均百分比误差为0.73%,非谐性为1.58%,与学术工艺跨导器件的制造和模拟到测量不确定性相当或更低。单个管道查询在CPU上约需56毫秒,而传统电磁电容提取约需2分钟,加速超2100倍。批处理最小化了人工智能模型推理开销,在CPU和GPU上分别将运行时减少到每个样本0.24毫秒和2.5微秒,相对于单个传统CPU电磁提取分别加速5.0 x 10^5和4.8 x 10^7。我们的结果表明,组件级逆设计有效地扩展和补充了传统电磁模拟,包括对于约1000个样本的小数据集。

英文摘要

Designing a superconducting qubit to realize specific Hamiltonian parameters typically requires iterating through a time and compute-intensive forward loop in which the designer chooses a layout geometry, simulates it, extracts circuit parameters such as capacitances, and refines the geometry. We study the inverse version of this task using a neural-network workflow that maps target Hamiltonian parameters directly to component-level layout parameters, which we subsequently demonstrate on a planar transmon layout. During training, we pair the inverse model with a frozen forward surrogate model and evaluate the loss in Hamiltonian space rather than in layout-parameter space. In validation against a conventional EM solver, 97% of generated designs produce usable geometries, and the inverse-plus-surrogate pipeline reaches mean percent errors of 0.73% for qubit frequency and 1.58% for anharmonicity, comparable to or below the fabrication and simulation-to-measurement uncertainty expected for academic-process transmon devices of this type. A single pipeline query takes ~60 ms on CPU, versus ~2 min for a conventional EM capacitance extraction on the same hardware, a speedup of approximately 2,000x. Batching minimizes the AI model inference overhead, reducing the runtime to 3.1 microseconds per sample on CPU and 2.6 microseconds per sample on GPU at a batch size of 2048, resulting in speedups of 3.9 x 10^7 and 4.6 x 10^7, respectively, relative to a single conventional CPU EM extraction. Our results indicate that component-level inverse design usefully extends and complements conventional EM simulation, including for small datasets on the order of 1,000 samples.

Commentsv2: Clarified the methodology, validation, and runtime comparisons, and corrected minor presentation issues. Results and conclusions are unchanged

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