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arXiv 2607.18287cs.LGcs.AI

BearingNAS:使用笔记本电脑获取用于轴承的传感器内智能故障诊断系统

BearingNAS: Obtaining In-Sensor Intelligent Fault Diagnosis Systems for Bearings Using a Laptop

Andrea Mattia Garavagno, Edoardo Ragusa, Paolo Gastaldo, Antonio Frisoli, Rodolfo Zunino

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中文总结 AI 辅助

研究利用BearingNAS框架,通过轻量级无导数搜索策略及单数据流搜索空间,针对微预算优化轴承故障诊断架构,在笔记本电脑CPU上运行,为意法半导体目标实现高诊断准确率,证明可将机器学习负载移至传感器封装内进行低成本故障诊断。

中文摘要 AI 辅助

本文介绍了BearingNAS,这是一种硬件感知神经架构搜索(HW-NAS)框架,旨在通过传感器内处理将智能直接转移到传感器芯片上。BearingNAS将搜索框架为针对极端微预算(4到8 KiB的RAM和16到32 KiB的Flash)的约束优化问题。为消除对昂贵离散GPU的依赖,我们提出了一种轻量级、无导数的搜索策略,以及一个利用衰减内核增长公式防止参数爆炸的单数据流搜索空间。我们在凯斯西储大学(CWRU)轴承基准上评估了我们的框架,为三个意法半导体目标优化架构:两个商用微控制器和LSM6DSO16IS智能传感器处理单元(ISPU)。搜索完全在笔记本电脑CPU上运行,不到一小时就收敛。在ISPU上,最终得到的最佳传感器内架构实现了99.50%的极具竞争力的诊断准确率。这些结果证明了将机器学习工作负载转移到传感器封装内的可行性,实现了低成本、生产规模的轴承故障诊断。

英文摘要

This paper introduces BearingNAS, a Hardware-Aware Neural Architecture Search (HW-NAS) framework designed to shift the intelligence directly onto the sensor die via in-sensor processing. BearingNAS frames the search as a constrained optimization problem targeting extreme micro-budgets (4 to 8 kiB of RAM and 16 to 32 kiB of Flash). To eliminate the reliance on expensive discrete GPUs, we propose a lightweight, derivative-free search strategy paired with a single data-flow search space that leverages a decaying kernel growth formulation to prevent parameter explosion. We evaluate our framework on the Case Western Reserve University (CWRU) bearing benchmark, optimizing architectures for three STMicroelectronics targets: two commodity microcontrollers and the LSM6DSO16IS Intelligent Sensor Processing Unit (ISPU). Running entirely on a laptop CPU, the search converges in less than an hour. The resulting best in-sensor architecture achieves a highly competitive diagnostic accuracy of 99.50\% on the ISPU. These results demonstrate the viability of shifting the machine learning workload inside the sensor package, enabling low-cost, production-scale bearing fault diagnosis.

发表机构

  • Case Western Reserve University(凯斯西储大学)
  • STMicroelectronics(意法半导体)

机构由 AI 辅助整理,请以论文原文为准。

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