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arXiv 2607.16139eess.SPcs.SYeess.SY

一种用于低功耗应用的卡尔曼滤波器辅助数据预测型 SAR ADC,具有降低的开关能量

A Kalman Filter-Assisted Data-Predictive SAR ADC With Reduced Switching Energy for Low-Power Applications

Xiyuan Feng, Yuxiang Zhao, Jie Xiong, Dian Lin, Yunlei Zhong, Wei Liu, Zhongheng Ji, Ruiyu Tian, Chenhao Zhuo, Yue Yin

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中文总结 AI 辅助

针对超低功耗 ADC 需求,提出卡尔曼滤波器辅助数据预测型 SAR ADC,通过预测 4 个 MSB 实现并行切换,减少开关能量和量化周期,优化切换方案,双模式操作,降低功耗,适用于无线传感器网络。

中文摘要 AI 辅助

物联网设备和可穿戴健康监测器的激增对超低功耗模数转换器(ADC)产生了迫切需求。逐次逼近寄存器(SAR)ADC 广泛用于此类应用,但其能量效率仍受电容性 DAC(CDAC)逐位顺序切换的限制。高权重最高有效位(MSB)转换主导总开关能量,且固定的 N 周期转换流程对延迟施加了硬下限。本文提出了一种卡尔曼滤波器辅助数据预测型 SAR ADC,它用递归状态估计器取代前四个比较器驱动的决策。卡尔曼滤波器在每个周期开始前根据完整转换历史预测 4 个 MSB,实现 MSB 电容的同时并行切换。这消除了冗余 CDAC 转换,将量化周期缩短四个时钟周期,并将开关能量降低约 50%。优化的 4 位 MSB 切换方案在硬件层面进一步抑制残余切换。该 ADC 采用 180nm CMOS 工艺设计,支持可配置双模式操作,在传统模式和卡尔曼驱动预测模式之间切换以应对不稳定输入。在 20MS/s 和 1.8V 电源下,预测模式将总功耗降低 50.3%(从 1.96mW 降至 0.975mW),在 504kHz 时测量的 SNR/SFDR 为 57.88/74.51dB,证实其适用于能量受限的无线传感器网络。

英文摘要

The proliferation of Internet of Things (IoT) devices and wearable health monitors has created an urgent demand for ultra-low-power analog-to-digital converters (ADCs). Successive approximation register (SAR) ADCs are widely used in such applications, yet their energy efficiency remains constrained by the sequential bit-by-bit switching of the capacitive DAC (CDAC). The high-weight most significant bit (MSB) transitions dominate the total switching energy, and the rigid N -cycle conversion flow imposes a hard lower bound on latency per sample.This paper presents a Kalman filter-assisted data-predictive SAR ADC that replaces the first four comparator-driven decisions with a recursive state estimator. The Kalman filter predicts the 4 MSBs from the complete conversion history before each cycle begins, enabling simultaneous parallel switching of the MSB capacitors. This eliminates redundant CDAC transitions, shortens the quantization cycle by four clock periods, and reduces switching energy by approximately 50%. An optimized 4-bit MSB switching scheme further suppresses residual switching at the hardware level. The ADC, designed in a 180-nm CMOS process, supports configurable dual-mode operation, toggling between a conventional mode and the Kalman-driven predictive mode for robustness under erratic inputs. At 20 MS/s and a 1.8-V supply, the predictive mode reduces total power consumption by 50.3% (from 1.96 mW to 0.975 mW), with a measured SNR/SFDR of 57.88/74.51 dB at 504 kHz, confirming its suitability for energy-constrained wireless sensor networks.

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