AI 中文总结
针对计算机体系结构模拟研究的挑战，提出ArchSim，其将硬件拓扑描述为声明性图自动生成代码，无状态运行器可自主执行作业，模拟输出结构化，评估显示能高效驱动模拟且开销小。
AI 中文摘要
进行完整的计算机体系结构模拟研究具有挑战性，因为配置、执行和分析通常隐式编码在脚本或目录约定中，而非明确表示。这导致研究难以扩展、重现，且各阶段依赖定制工具。我们提出了ArchSim，它使模拟研究结构明确。硬件拓扑被描述为声明性图，可自动生成可执行模拟代码，消除手写模拟器程序。无状态运行器从共享实验存储中自主获取并执行作业，使配置-基准矩阵无需手动编排即可扩展。模拟输出作为与配置、基准和硬件组件相关的结构化工件存储，无需定制解析器即可进行系统的结果探索。我们在一个包含12×8 = 96种配置的模拟矩阵上评估了ArchSim，该矩阵涵盖内存受限、计算受限和混合强度的GPU工作负载。声明性模拟规范驱动完整模拟，相对于手写的MGPUSim配置，在95.8%的配置上，内核时间中位数误差为0.18%。该平台每次模拟仅引入1.6秒的开销，相对于实际模拟工作负载可忽略不计。
英文摘要
Conducting a complete computer architecture simulation study is challenging because configuration, execution, and analysis are often encoded implicitly in scripts or directory conventions rather than represented explicitly. As a result, studies are difficult to scale, hard to reproduce, and dependent on custom tooling at every stage. We present ArchSim, which makes the structure of a simulation study explicit. In ArchSim, hardware topologies are described as declarative graphs that automatically generate executable simulation code, eliminating hand-written simulator programs. Stateless runners autonomously claim and execute jobs from a shared experiment store, enabling configuration-benchmark matrices to scale without manual orchestration. Simulation outputs are stored as structured artifacts tied to configurations, benchmarks, and hardware components, enabling systematic result exploration without custom parsers. We evaluate ArchSim on a 12 x 8 = 96-configuration simulation matrix spanning memory-bound, compute-bound, and mixed-intensity GPU workloads. Declarative simulation specifications drive full simulations with a median kernel time error of 0.18% relative to hand-written MGPUSim configurations across 95.8% of configurations. The platform introduces only 1.6 seconds of overhead per simulation, negligible relative to realistic simulation workloads.
