ORRAM：一种使用标准单元的OpenROAD集成RAM生成器
ORRAM: An OpenROAD-Integrated RAM Generator Using Standard Cells
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中文总结 AI 辅助
研究针对交钥匙ASIC设计流程中内存推断挑战，提出基于标准单元的ORRAM内存生成器，作为OpenROAD原生模块，支持多种功能，兼容多数库，在SkyWater 130nm评估中匹配历史DFFRAM位密度且功能更丰富，代码开源。
中文摘要 AI 辅助
在交钥匙ASIC设计流程中，内存推断仍然是一项重大挑战。从RTL推断触发器会创建数千个紧密互连的实例，这会显著减慢设计流程并阻碍性能。内存编译器解决了这个问题，尽管它们是第三方工具，通常特定于PDK，可能需要基础PDK中没有的专用单元。为了解决这些缺点，我们提出了ORRAM，一种基于标准单元的内存生成器，作为OpenROAD中的原生模块构建。给定一个标准单元库，ORRAM会生成一个完全布局和布线的RAM块，无需自定义位单元或外部工具，通过OpenSTA而不是SPICE仿真进行时序验证。ORRAM支持任意字大小、字数、掩码粒度、多端口读取配置、列复用、基于锁存器的存储以及自动与PDK无关的单元选择，使其与大多数标准单元库兼容，包括sky130hd和NanGate45。在SkyWater 130nm上进行评估时，ORRAM与历史DFFRAM结果的位密度相匹配，同时提供了显著扩展的功能集。源代码作为OpenROAD项目的一部分提供。
英文摘要
Memory inference remains a significant challenge in turnkey ASIC design flows. Inferring flip-flops from RTL can create thousands of densely interconnected instances which dramatically slow down design flows and impede performance. Memory compilers address this issue, although they are third-party tools which are often PDK-specific and may require specialized cells not in the base PDK. To address these shortcomings, we present ORRAM, a standard-cell-based memory generator built as a native module within OpenROAD. Given a standard cell library, ORRAM produces a fully placed and routed RAM block requiring no custom bitcells or external tooling, with timing verification via OpenSTA rather than SPICE simulation. ORRAM supports arbitrary word sizes, word counts, mask granularities, multi-port read configurations, column muxing, latch-based storage, and automatic PDK-agnostic cell selection, making it compatible with most standard cell libraries including sky130hd and NanGate45. Evaluated on SkyWater 130nm, ORRAM matches the bit density of historical DFFRAM results while offering a significantly expanded feature set. The source code is available as part of the OpenROAD project.
