AI 中文总结
研究硅自旋量子计算最佳工作温度，通过门集层析成像在多温度下对双量子比特硅芯片测试，结合冷却需求与纠错开销开发功率模型，发现有限最佳温度受近1K交叉温度影响，为大规模硅量子计算机提供设计指南。
AI 中文摘要
硅自旋量子比特因其与半导体制造的兼容性，是大规模量子计算的主要候选者。然而，扩展到实用的容错处理器可能会产生超过毫开尔文温度下可用冷却功率的热负载。提高工作温度可减轻冷却需求，但会降低门保真度，增加量子纠错开销。确定使总功耗最小的工作温度是商业可行量子计算机的关键挑战。我们使用门集层析成像对工业和学术环境中制造的双量子比特硅芯片在一系列温度下进行基准测试。高温会大幅缩短相干时间，增加门以及态制备和测量的不保真度。基于这些测量，我们开发了一个结合低温冷却需求和纠错开销的硅量子计算机通用功率模型。我们表明存在一个有限的最佳工作温度，并且受到当前器件中接近1K的交叉温度的强烈影响，高于该温度门保真度会迅速下降。这些结果将器件级保真度限制与系统级功率要求联系起来，为大规模硅量子计算机提供了设计指南。
英文摘要
Silicon spin qubits are a leading candidate for large-scale quantum computing owing to their compatibility with semiconductor manufacturing. However, scaling to useful fault-tolerant processors will likely generate thermal loads that exceed the cooling power available at millikelvin temperatures. Raising the operating temperature eases cooling requirements but reduces gate fidelity, increasing the overhead of quantum error correction. Identifying the operating temperature that minimizes total power consumption is therefore a key challenge for commercially viable quantum computers. Here, we use gate set tomography to benchmark two-qubit silicon chips fabricated in both industrial and academic environments over a range of temperatures. Elevated temperatures substantially shorten coherence times and increase gate and state-preparation-and-measurement infidelities. Based on these measurements, we develop a general power model for silicon quantum computers that combines cryogenic cooling requirements with error-correction overheads. We show that a finite optimal operating temperature exists and is strongly influenced by a crossover temperature near 1 K in current devices, above which gate fidelity degrades rapidly. These results connect device-level fidelity limitations to system-level power requirements, providing design guidelines for large-scale silicon quantum computers.
Comments16 pages, 6 figures, 4 extended data figures
