AI 中文总结
针对中性原子量子计算执行速度慢的问题，提出基于FPGA的AtomFlow控制架构，将荧光图像分析与原子重排算法整合到单个设备，消除往返延迟，在16×16原子阵列上评估取得良好延迟数据，且可支持更大原子阵列。
AI 中文摘要
中性原子量子计算（NAQC）是一种新兴的可扩展量子计算模式，因其长相干时间和天然相同的原子量子比特而受到重视。然而，其主要缺点之一是执行速度慢，受荧光成像、冷却和原子重排等冗长的经典处理任务主导。我们用AtomFlow解决这一瓶颈，它是一种基于现场可编程门阵列（FPGA）的控制架构，将荧光图像分析和新开发的原子重排算法整合到单个Zynq UltraScale+设备上。通过将这两个阶段放在同一板上，并在计算出重排移动后立即以流方式发出，AtomFlow消除了传统主机介导管道的往返延迟。在16×16原子阵列上评估，AtomFlow实现了25.3毫秒的端到端延迟，首次移动延迟为4毫秒，平均移动生成时间为1毫秒。此外，我们的可扩展性分析表明，该架构可以在单板资源预算内轻松支持更大的原子阵列。
英文摘要
Neutral Atom Quantum Computing (NAQC) is an emerging modality for scalable quantum computation, valued for its long coherence times and the naturally identical atomic qubits. However, one of the main drawbacks is its slow execution rate, dominated by lengthy classical processing tasks, such as fluorescence imaging, cooling, and atom rearrangement. We address this bottleneck with AtomFlow, a field-programmable gate array (FPGA)-based control architecture that consolidates fluorescence-image analysis and a newly developed atom-rearrangement algorithm onto a single Zynq UltraScale+ device. By co-locating the two stages on the same board and emitting rearrangement moves in a streaming fashion as soon as they are computed, AtomFlow eliminates the round-trip latency of conventional host-mediated pipelines. Evaluated on a 16x16 atom array, AtomFlow achieves an end-to-end latency of 25.3 ms with a first-move latency of 4 ms and an average move generation of 1 ms. Furthermore, our scalability analysis demonstrates that the architecture can readily support larger atom arrays within a single-board resource budget.
CommentsAccepted for 2026 IEEE International Conference on Quantum Computing and Engineering (QCE)
