静态预充电半缓冲器异步电路中的软错误特性及加固权衡
Soft-Error Characterization and Hardening Trade-offs in Static PCHB Asynchronous Circuits
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中文总结 AI 辅助
研究静态PCHB电路软错误特性及加固权衡,开发晶体管级故障注入框架提取临界电荷,识别易损节点,评估四种缓解策略,通过仿真得出延迟、能量和面积方面的弹性 - 开销比较及加固指南。
中文摘要 AI 辅助
预充电半缓冲器(PCHB)是一种适用于恶劣环境操作的异步数字设计范例,但其软错误特性在很大程度上仍未被探索。本文针对静态PCHB电路进行了系统的软错误特性及加固权衡分析。开发了一个可控的晶体管级故障注入框架来提取内部节点的极性相关临界电荷。基于大量仿真识别出易损节点。在五个代表性PCHB单元上实现并评估了四种缓解策略。报告了在延迟、能量和面积方面的综合弹性 - 开销比较,得出了针对稳健静态PCHB设计的特定架构加固指南。
英文摘要
Pre-Charge Half Buffer (PCHB) is a promising asynchronous digital design paradigm for harsh-environment operation; however, its soft-error characteristics remain largely unexplored. This paper presents a systematic soft-error characterization and hardening trade-off analysis for static PCHB circuits. A controlled transistor-level fault-injection framework is developed to extract polarity-dependent critical charge at internal nodes. Vulnerability nodes are identified based on extensive simulation. Four mitigation strategies, double-sided Schmitt trigger, single-sided Schmitt trigger, transmission-gate reinforcement, and duplication-based redundancy, are implemented and evaluated across five representative PCHB cells. Comprehensive resilience-overhead comparisons in delay, energy, and area are reported, leading to architecture-specific hardening guidelines for robust static PCHB design.