关于通过环面多项式对与门的 \(CC^0\) 下界研究
On $CC^0$ Lower Bounds for AND via Torus Polynomials
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中文总结 AI 辅助
研究 \(CC^0\) 电路能否计算与门这一问题，利用环面多项式逼近方法，通过 Krishan 和 Vishwanathan 给出的对称环面多项式次数下界，证明对称 \(CC^0\) 电路计算与门的规模下界，并在非对称情况下为特定深度为三的电路建立次数上界，推进常数次数假设。
中文摘要 AI 辅助
我们探讨一种基于环面多项式逼近的方法来解决一个长期存在的问题：与门能否由 \(CC^0\) 电路计算，\(CC^0\) 电路是一类包含某些 \(m\) 的 \(MOD_m\) 门的常数深度多项式规模电路。Bhrushundi 等人（ITCS 2019）引入环面多项式逼近作为证明针对 \(ACC^0\)（包含 \(CC^0\) 且由与、或、非门组成）下界的一种方法。我们展示了逼近与门的环面多项式下界如何用于推进此问题。利用 Krishan 和 Vishwanathan（ITCS 2026）给出的逼近与门的对称环面多项式次数下界，我们证明了计算与门的对称 \(CC^0\) 电路的规模下界。具体而言，我们证明任何深度为 \(h\) 的对称 \(CC^0\) 电路计算与门需要 \(2^{\widetilde{\Omega}(n^{1/O(h)})}\) 的规模。我们证明中的一个关键要素是可以构造对称环面多项式来逼近对称 \(CC^0\) 电路。我们的构造展示了电路对称性与多项式对称性之间的明确对应关系。利用此，我们还为较弱的电路对称性概念建立了下界。Pago（ICALP 2026）使用不同技术独立建立了对称 \(CC^0\) 电路的下界。在非对称情况下，我们为形式为 \(MOD_p \circ MOD_m \circ AND_{O({\color{red} 1})}\)（其中 \(m = pq\) 是半素数）的深度为三的电路建立了次数上界。此电路类是 Barrington、Straubing 和 Therien（Inf. and Comp., 1990）引入的常数次数假设的一个特殊情况，其中 \(m\) 可以是任意合数。我们认为改进的逼近与门的非对称环面多项式下界意味着半素数 \(m\) 的规模下界，从而推进常数次数假设。
英文摘要
We explore a torus polynomial approximation based approach towards a long-standing question: whether $AND$ can be computed by $CC^0$ circuits - the class of constant-depth polynomial size circuits containing $MOD_m$ gates for some $m$. Bhrushundi et al. (ITCS 2019) introduced torus polynomial approximations as an approach for proving lower bounds against $ACC^0$ - a class containing $CC^0$ with circuits comprising $AND$, $OR$ and $NOT$ gates. We show how lower bounds for torus polynomials approximating $AND$ can be used to make progress on this question. Using lower bounds on the degree of symmetric torus polynomials approximating $AND$ from Krishan and Vishwanathan (ITCS 2026), we prove size lower bounds for symmetric $CC^0$-circuits computing $AND$. More precisely, we prove that any depth $h$ symmetric $CC^0$ circuit requires $2^{\widetildeΩ(n^{1/O(h)})}$ size to compute $AND$. A key ingredient in our proof is an argument that we can construct symmetric torus polynomials to approximate symmetric $CC^0$ circuits. Our construction exhibits an explicit correspondence between the symmetry of the circuit and that of the polynomial. Using this, we also establish lower bounds for weaker notions of circuit symmetry. Lower bounds for symmetric $CC^0$ circuits were also independently established by Pago (ICALP 2026) using different techniques. In the asymmetric regime, we establish degree upper bounds for depth three circuits of the form $MOD_p \circ MOD_m \circ AND_{O(1)}$ where $m=pq$ is a semiprime. This circuit class is a special case of the constant degree hypothesis, introduced by Barrington, Straubing and Therien (Inf. and Comp., 1990), where $m$ could be an arbitrary composite number. We argue that improved lower bounds for asymmetric torus polynomials approximating $AND$ imply size lower bounds for semiprime $m$ and hence progress on the constant-degree hypothesis.
