AI 中文总结
研究可逆逻辑在商业系统中未扩展的问题，通过CMOS转换框架评估，结合多种模型和方法，确定电感损耗限制，表明高能量密度动态电感可助力扩展，还给出评估其可行性及潜在益处的方法。
AI 中文摘要
长期以来，可逆逻辑一直有望大幅降低能耗，但先前的演示尚未扩展到商业相关系统。本文提出了一个通过CMOS转换过程评估可逆逻辑的定量框架，即将传统CMOS设计转换为功能等效的可逆实现，并使用常见性能指标进行比较。该框架结合了规划方程、动态电感储能模型、四相4LC能量回收电源以及考虑数据相关负载效应的基于RLC的仿真方法。分析确定电感损耗是传统方法的基本限制，并表明高能量密度的动态电感为扩展可逆系统提供了必要的设计余量。利用代表性器件参数，该框架表明选定的低温CMOS量子比特控制器电路可以使用现有或近期技术转换为可逆逻辑。本文提供了一种评估其在未来应用中的可行性和潜在益处的方法，而非宣称可逆逻辑的商业化。
英文摘要
Reversible logic has long promised substantial reductions in energy dissipation, yet prior demonstrations have not scaled to commercially relevant systems. This work presents a quantitative framework for evaluating reversible logic through a process termed CMOS conversion, in which a conventional CMOS design is transformed into a functionally equivalent reversible implementation and compared using common performance metrics. The framework combines planning equations, kinetic-inductor energy-storage models, a four-phase 4LC energy-recycling power supply, and RLC-based simulation methods that account for data-dependent loading effects. The analysis identifies inductor loss as a fundamental limitation of conventional approaches and shows that high-energy-density kinetic inductors provide essential design margin for scaling reversible systems. Using representative device parameters, the framework suggests that selected cryogenic CMOS qubit controller circuits could be converted to reversible logic using available or near-term technologies. Rather than claiming commercialization of reversible logic in general, the paper provides a methodology for assessing its feasibility and potential benefits across future applications.
Comments17 pages, 12 figures, submitted for peer review
