发表机构
Pennsylvania State University; Shanghai Jiao Tong University; Microsoft Research; Binghamton University（宾夕法尼亚州立大学; 上海交通大学; 微软研究院; 宾汉姆顿大学）
机构由 AI 辅助整理，请以论文原文为准。AI 中文总结
介绍OmniLayout基准测试，用于评估大语言模型在印刷电路板布局放置推理。含1681个工业级原理图耦合PCB布局及四项任务，揭示当前大语言模型在PCB布局放置上有诸多局限。
AI 中文摘要
近期大语言模型在3D空间推理等方面有进展，但在严格约束下密集物体放置推理能力未充分探索。为此引入OmniLayout，首个评估大语言模型在印刷电路板布局放置推理的基准测试，含1681个布局及四项任务，揭示了当前大语言模型的局限。
英文摘要
Recent large language models (LLMs) have demonstrated remarkable progress in 3D spatial reasoning, spatial grounding, and fine-grained geometric understanding. However, their ability to reason about densely packed object placement under strict spatial and functional constraints remains largely unexplored, despite being a fundamental challenge in practical electronic design automation (EDA) workflows. To bridge this gap, we introduce OmniLayout, the first benchmark designed to evaluate LLMs on printed-circuit-board (PCB) layout placement reasoning under real-world geometric, routing, and connectivity constraints. OmniLayout contains 1,681 industrial-grade schematic-coupled PCB layouts and includes four tasks: (1) geometric reasoning for IC physical placement, with 77.24K placement instances constrained within PCB board boundaries; (2) routability-aware placement reasoning, generating physically valid component placements; (3) electrical functionality, preserving schematic-specified connectivity and electronic functional correctness; and (4) tool-augmented agentic reasoning for invoking external tools to accomplish tasks (1)-(3). Our results reveal substantial limitations of current LLMs in PCB layout placement, including weak geometric reasoning, poor routability optimization, and inconsistent preservation of electrical functionality.
