评估CGRA中的架构权衡：Scratchpad内存和异构性对计算密集型内核的影响
Evaluating Architectural Trade-offs in CGRAs: The Impact of Scratchpad Memory and Heterogeneity on Compute-Intensive Kernels
AI总结：
本文分析了CGRA设计中处理单元异构性和局部数据重用支持对计算密集型内核的影响，通过FFT、GEMM和端到端癫痫检测变压器工作负载评估，发现SPM可减少八倍内存流量，同构架构面积开销比异构小4.4-8.2倍且频率达700MHz，为边缘工作负载选择CGRA架构提供路线图。
摘要：
现代边缘计算应用，特别是高吞吐量流处理如视觉变换器（ViTs），在严格的功耗和面积约束下需要大规模空间并行性和高效的数据移动。粗粒度可重构架构（CGRAs）提供了一种有前景的范式来平衡性能、灵活性和能效。本文分析了两个关键的CGRA设计选择的影响：处理单元异构性和局部数据重用支持。我们评估了基本计算内核（快速傅里叶变换（FFT）和通用矩阵乘法（GEMM））以及一个端到端的癫痫检测变压器工作负载，跨越两种不同的配置：基线同构架构和集成专用功能单元与Scratchpad内存（SPM）的异构演进。我们的评估表明，SPM显著优化了数据移动，与无内存设计相比减少了八倍的内存流量。虽然异构架构在数据洗牌任务中实现了卓越的能效，但同构架构相对于最先进的CGRAs将面积开销最小化了4.4倍到8.2倍。此外，它维持了700 MHz的工作频率，在矩阵计算期间实现了比异构配置高达5倍的执行加速。最终，这项工作为根据边缘规模工作负载的算术强度、性能目标和资源限制选择CGRA架构提供了架构路线图。
英文摘要：
Modern edge computing applications, particularly high-throughput stream processing like Vision Transformers (ViTs), demand massive spatial parallelism and efficient data movement under tight power and area constraints. Coarse-Grained Reconfigurable Architectures (CGRAs) offer a promising paradigm to balance performance, flexibility, and energy efficiency. This paper analyzes the impact of two critical CGRA design choices: processing element heterogeneity and local data reuse support. We evaluate essential computational kernels (Fast Fourier Transform (FFT) and General Matrix Multiply (GEMM)) alongside an end-to-end seizure detection transformer workload across two distinct configurations: a baseline homogeneous architecture and a heterogeneous evolution integrating specialized functional units with an Scratchpad Memory (SPM). Our evaluation demonstrates that the SPM significantly optimizes data movement, reducing memory traffic eightfold compared to a memory-less design. While the heterogeneous architecture achieves superior energy efficiency for data-shuffling tasks, the homogeneous design minimizes area overhead by 4.4x to 8.2x relative to state-of-the-art CGRAs. Furthermore, it sustains a 700 MHz operating frequency, enabling up to a 5x execution speedup over the heterogeneous configuration during matrix computations. Ultimately, this work provides an architectural roadmap for selecting CGRA fabrics based on the arithmetic intensity, performance goals, and resource envelopes of edge-scale workloads.
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